ESD Protection Circuit Center Tap Integration

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Solution Overview

Problem

The large size of ESD protection circuits in semiconductor integrated circuits hinders miniaturization, leading to increased costs and compromised communication quality in radio communication apparatuses like smart meters.

Innovation Solution

Incorporating an ESD protection circuit connected to the center tap of a transformer within the semiconductor integrated circuit, reducing the number of ESD protection circuits and optimizing their placement to minimize parasitic capacitance and area, allowing for miniaturization while maintaining effective electrostatic discharge protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an ESD protection circuit is provided in a semiconductor integrated circuit for protecting circuit elements from electrostatic discharge, then reliability is improved, but the area of the semiconductor integrated circuit increases

Engineering Contradiction:
Improveprotection from electrostatic dischargeVSAvoidarea of semiconductor integrated circuit
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple ESD protection circuits into a single integrated ESD protection circuit that protects multiple circuit elements simultaneously. This merging approach reduces the total area occupied by ESD protection circuits while maintaining comprehensive protection across the semiconductor integrated circuit, directly resolving the contradiction between reliability improvement and area increase.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ESD protection circuit is designed with multi-functionality to protect various circuit elements (such as RF circuits, baseband circuits, and other sensitive components) within the semiconductor integrated circuit using a single protection structure. This universal protection approach eliminates the need for separate ESD protection circuits for each component, thereby reducing overall area while ensuring reliable protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If the semiconductor integrated circuit is miniaturized to reduce costs and improve integration, then area is reduced, but the effectiveness of ESD protection may be compromised

Engineering Contradiction:
Improvearea of semiconductor integrated circuitVSAvoideffectiveness of ESD protection
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

By merging multiple ESD protection functions into a single integrated circuit structure, the patent achieves miniaturization without compromising protection effectiveness. The combined ESD protection circuit maintains adequate protection capability for all connected circuit elements while occupying minimal area, thus resolving the contradiction between miniaturization and protection effectiveness.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent optimizes parameters of the ESD protection circuit such as clamp voltage, leakage current, and response time to ensure effective protection within a minimized area. By carefully adjusting these parameters, the circuit achieves high effectiveness in electrostatic discharge protection while maintaining a compact footprint suitable for miniaturized semiconductor integrated circuits.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10361665B2Semiconductor integrated circuit, communication module, and smart meter
Publication Date: 2019.07.23 RENESAS ELECTRONICS CORP
  • US10361665B2 patent drawing
  • US10361665B2 patent drawing
  • US10361665B2 patent drawing

AI summary

A semiconductor integrated circuit includes a low-noise amplifier circuit, a transformer, and an ESD protection circuit. The low-noise amplifier circuit amplifies a radio signal that is supplied to an input terminal. The transformer includes a first winding and a second winding and functions as an input impedance matching circuit for the low-noise amplifier circuit, in which at least one end of the second winding is connected to the input terminal of the low-noise amplifier circuit. The ESD protection circuit is connected to a center tap of the first winding.