Electrostatic Protective Circuit Parasitic Capacitance Reduction

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Solution Overview

Problem

Existing electrostatic protective circuits face challenges in achieving both high electrostatic resistance and RF characteristics, particularly in high-frequency regions, due to the contradictory nature of securing electrostatic discharge capacity and reducing parasitic capacitance, which affects harmonic distortion and isolation characteristics.

Innovation Solution

The electrostatic protective circuit employs a semiconductor layer with a specific structure, including a primary and secondary conductive impurity diffused layer, a body region, and a device separating layer, functioning as a one-stage diode for electrostatic discharge and a three-stage diode during normal operation to minimize parasitic capacitance and maintain high isolation characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a diode is inserted as an electrostatic protective device to secure electrostatic discharge capacity, then electrostatic resistance is improved, but parasitic capacitance increases and RF characteristics deteriorate

Engineering Contradiction:
Improveelectrostatic resistanceVSAvoidRF characteristics (harmonic distortion and isolation characteristics)
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The electrostatic protective device is divided into multiple functional regions: a first conductive type impurity diffused layer, a second conductive type impurity diffused layer, and a third conductive type impurity diffused layer arranged in sequence. This segmentation creates multiple junctions that reduce parasitic capacitance while maintaining electrostatic discharge capacity, resolving the contradiction between electrostatic resistance and RF characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the electrostatic protective device are doped with different conductive type impurities to create localized electrical properties. The first layer uses one conductive type, while the second and third layers use the opposite conductive type, creating alternating PN junctions with different capacitance characteristics in different locations, thereby reducing overall parasitic capacitance while maintaining protection capability.

Inventive Principle:
Principle #3Local quality

2Reliability

If the junction area of the diode is increased to secure electrostatic discharge capacity, then electrostatic resistance is improved, but parasitic capacitance increases and RF characteristics deteriorate

Engineering Contradiction:
Improveelectrostatic discharge capacityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The junction area is segmented into multiple smaller junctions formed by the sequential arrangement of first, second, and third impurity diffused layers. This segmentation allows the total electrostatic discharge capacity to be distributed across multiple junctions, reducing the parasitic capacitance of each individual junction while maintaining the overall protection capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The electrostatic protective device utilizes a vertical stacking arrangement of impurity diffused layers in the depth direction, creating a three-dimensional structure. This dimensional change allows multiple junctions to be stacked vertically, reducing the in-plane junction area and thereby reducing parasitic capacitance while maintaining electrostatic discharge capacity through the stacked configuration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively enhances electrostatic resistance and RF characteristics by reducing parasitic capacitance to a third of traditional designs, while maintaining high capacity for protection and improving impedance and isolation performance, especially in high-frequency signals.

Implementation Method 1

One typical generation source of the electrostatic discharge is, for example, a human body in which static electricity more than 2,000 V is accumulated. Thus, when a human being handles an IC package on which a semiconductor integrated circuit is mounted without taking any protective measure for static electricity, there is a possibility that abrupt electrostatic discharge occurs

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Implementation Method 2

As a method for protecting the semiconductor integrated circuit from such electrostatic discharge, it is common to form a resistive route by inserting a diode as an electrostatic protective device to shunt a route to an electrode pad from the semiconductor integrated circuit that is a circuit to be protected

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10361183B2Electrostatic protective device and electrostatic protective circuit
Publication Date: 2019.07.23 SONY SEMICON SOLUTIONS CORP
  • US10361183B2 patent drawing
  • US10361183B2 patent drawing
  • US10361183B2 patent drawing

AI summary

The electrostatic protective device includes an insulator and a semiconductor layer. The semiconductor layer includes a device forming region and a device separating region. The device forming region includes a primary first conductive impurity diffused layer, a body region, a secondary first conductive impurity diffused layer, and a second conductive region that are arranged in order. The second conductive region includes a second conductive impurity diffused layer separated electrically from the body region. The device separating region includes a device separating layer that surrounds the device forming region. A gate electrode is further provided on the body region in the semiconductor layer with an insulating film interposed in between.