ESD Clamp Auto Biasing High Injection PNP SCR Hybrid

Solution Overview

Problem

Existing ESD protection solutions for narrow protection windows, such as in high output power arrays, face challenges in balancing high holding voltage and current handling capacity, with lateral PNP BJTs providing high holding voltages but limited current capacity, and SCRs offering higher currents but lower holding voltages.

Innovation Solution

An ESD protection circuit with a PNP structure, an n-type emitter on the cathode side, and an auto-biasing circuit using an NMOS transistor controlled by a reference Zener diode to selectively engage an n-type emitter for enhanced current handling during ESD events, achieving a combination of high holding voltage and high current capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a lateral PNP BJT is used for ESD protection, then high holding voltage is achieved, but current handling capacity is limited

Engineering Contradiction:

Improveholding voltageVSAvoidcurrent handling capacity

Core Design Contradiction:

StrengthVSQuantity of substance

Solution Approach 1:

The patent merges the PNP BJT structure with an n-type emitter region to form a PNP-SCR hybrid device. This combines the high holding voltage characteristic of PNP devices with the high current handling capability of SCR devices, achieving both goals simultaneously rather than choosing one over the other.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an auto-biasing circuit that dynamically controls the engagement of the n-type emitter region based on operating conditions. During normal operation, the device operates as a PNP with high holding voltage. During ESD events, the auto-biasing circuit activates the n-type emitter to provide enhanced current handling capacity.

Inventive Principle:

Principle #15Dynamics

2Quantity of substance

If an SCR device is used for ESD protection, then current handling capacity is increased, but holding voltage decreases

Engineering Contradiction:

Improvecurrent handling capacityVSAvoidholding voltage

Core Design Contradiction:

Quantity of substanceVSStrength

Solution Approach 1:

The patent merges the PNP BJT structure with an n-type emitter region to form a PNP-SCR hybrid device. This combines the high holding voltage characteristic of PNP devices with the high current handling capability of SCR devices, achieving both goals simultaneously rather than choosing one over the other.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces an auto-biasing circuit that dynamically controls the engagement of the n-type emitter region based on operating conditions. During normal operation, the device operates as a PNP with high holding voltage. During ESD events, the auto-biasing circuit activates the n-type emitter to provide enhanced current handling capacity.

Inventive Principle:

Principle #15Dynamics

3Quantity of substance

If the size of the PNP device is increased to handle higher currents, then current handling capacity is improved, but device footprint increases

Engineering Contradiction:

Improvecurrent handling capacityVSAvoiddevice footprint

Core Design Contradiction:

Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent changes the operational parameters of the device by introducing an n-type emitter region that can be selectively activated. This allows the same physical device structure to operate in different modes (PNP mode for normal operation, SCR mode for ESD protection), achieving high current handling without increasing the physical footprint.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides an ideal vertical I-V characteristic with improved on-state resistance and adjustable holding voltage, effectively addressing the limitations of existing solutions by enabling higher current handling without compromising holding voltage.

Implementation Method 1

The Zener may be connected between a high voltage node, e.g. a pad, and the NMOS gate. The auto-biasing circuit may include a resistor connected between the gate and ground.

Methodology Applied

Scientific EffectZener breakdown: Avalanche Breakdown

Implementation Method 2

The auto-biasing circuit may comprise an NMOS transistor. The NMOS transistor may be controlled by a reference Zener diode connected to a gate of the NMOS transistor.

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

One type of device commonly used for ESD protection is a lateral PNP bipolar junction transistor (BJT)

Methodology Applied

Scientific EffectBipolar junction transistor operation:

Data Source

PatentUS8559144B2ESD clamp with auto biasing under high injection conditions

Publication Date: 2013.10.15 NAT SEMICON CORP

AI summary

In an SCR ESD protection circuit, the n-type emitter of the SCR is controlled to receive electron current only during an ESD event, thereby defining PNP characteristics during normal operation and SCR characteristics during an ESD event.