High-Voltage Tolerant Power Rail ESD Clamp Circuit
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Solution Overview
Problem
Existing high-voltage ESD protection technologies face limitations in turn-on speed, turn-on voltage, and gate-oxide reliability, especially when operating beyond their device limitations, and require additional process steps and larger chip areas, making them costly and inflexible for mixed-voltage IO interfaces.
Innovation Solution
A high-voltage tolerant power-rail ESD clamp circuit that includes an ESD detection circuit with a voltage divider, substrate driver, RC distinguisher, and transistors to provide a substrate-triggered current for quick and uniform ESD current discharge, using only 1.2-V low-voltage devices to handle up to 3.3-V power supply voltages without gate-oxide reliability issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If thin-gate-oxide devices are used for high-voltage operation, then operating frequency is improved, but gate-oxide reliability deteriorates
Solution Approach 1:
The patent introduces a field-oxide device as an intermediary element between the thin-gate-oxide circuit and the high-voltage environment. This field-oxide device acts as a mediator that can withstand high voltages while the thin-gate-oxide devices operate at their optimal lower voltages, thus both high operating frequency and gate-oxide reliability are maintained
Solution Approach 2:
The patent segments the voltage handling function by separating the high-voltage interface function (handled by field-oxide devices) from the high-speed processing function (handled by thin-gate-oxide devices). This segmentation allows each type of device to operate in its optimal voltage range, resolving the contradiction between speed and reliability
2Reliability
If thick-gate-oxide devices are used for high-voltage operation, then gate-oxide reliability is improved, but operating frequency deteriorates
Solution Approach 1:
The patent segments the circuit into different voltage domains, with thick-gate-oxide field-oxide devices handling only the high-voltage interface functions and thin-gate-oxide devices handling the high-speed processing functions. This segmentation prevents the frequency limitation of thick-gate-oxide devices from affecting the overall system performance
3Reliability
If ESD protection elements without gate oxide are used, then high-voltage tolerance is improved, but turn-on speed and turn-on voltage deteriorate
Solution Approach 1:
The patent merges the advantages of field-oxide devices (high-voltage tolerance) with the advantages of thin-gate-oxide devices (fast turn-on speed) by using the field-oxide device to trigger the thin-gate-oxide ESD protection element. The field-oxide device detects high-voltage conditions and activates the fast-responding thin-gate-oxide element, combining both benefits
4Speed
If forward-biased diode string is used as ESD protection element, then turn-on speed is improved, but leakage current increases
Solution Approach 1:
The patent changes the operating parameters of the ESD protection element by using a field-oxide device to control the triggering conditions. The field-oxide device monitors voltage levels and only activates the ESD protection when high-voltage conditions are detected, thereby reducing unnecessary leakage current while maintaining fast turn-on speed when needed
Data Source
AI summary
A high-voltage tolerant power-rail ESD clamp circuit is proposed, in which circuit devices can safely operate under the high power supply voltage that is three times larger than their process limitation without gate-oxide reliability issue. Moreover, an ESD detection circuit is used to effectively improve the whole ESD protection function by substrate-triggered technique. Because only low voltage (1*VDD) devices are used to achieve the object of high voltage (3*VDD) tolerance, the proposed design provides a cost effective power-rail ESD protection solution to chips with mixed-voltage interfaces.