Active ESD Clamp Deactivation for Stress Testing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Electrostatic discharge (ESD) protection circuitry in electronic devices often limits the maximum stress voltage during testing, leading to invalidation of stress tests and potential damage, and requires costly self-protecting DMOS transistors, which increase surface area and costs.

Innovation Solution

Incorporating deactivation circuitry that disconnects the trigger circuit of active clamp ESD protection structures during slow voltage changes, allowing higher stress test voltages without compromising ESD robustness, using a combination of transient detection and deactivation circuits to manage voltage thresholds and prevent unnecessary activation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ESD protection circuitry is used to protect electronic devices from electrostatic discharge, then ESD robustness is improved, but the maximum stress voltage during testing is limited and testing costs increase

Engineering Contradiction:
ImproveESD robustnessVSAvoidtesting efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by making the ESD protection circuit's triggering mechanism controllable and switchable. The deactivation circuitry dynamically controls the triggering circuitry based on detected voltage transition characteristics (dV/dt), allowing the protection circuit to be activated during fast ESD events and deactivated during slow stress testing, thus resolving the contradiction between maintaining ESD robustness and enabling efficient stress testing

Inventive Principle:
Principle #15Dynamics

2Reliability

If self-protecting DMOS transistors are used for ESD protection, then ESD protection capability is improved, but surface area and manufacturing costs increase

Engineering Contradiction:
ImproveESD protection capabilityVSAvoidsurface area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the operational parameters of the ESD protection circuit by introducing deactivation circuitry that modifies the triggering behavior. Instead of using inherently protective but area-intensive self-protecting DMOS transistors, the invention uses standard ESD protection structures with controlled triggering parameters, achieving the same protection capability with reduced surface area and lower manufacturing costs

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10971488B2Active ESD clamp deactivation
Publication Date: 2021.04.06 INFINEON TECHNOLOGIES AG
  • US10971488B2 patent drawing
  • US10971488B2 patent drawing
  • US10971488B2 patent drawing

AI summary

A circuit includes electrostatic discharge (ESD) protection circuitry, triggering circuitry, transient detection circuitry, and deactivation circuitry. The ESD protection circuitry is coupled between a first rail and a second rail. The triggering circuitry is configured to generate an ESD activation signal when a voltage across the first rail and the second rail exceeds a voltage threshold. The ESD protection circuitry is configured to activate based on the ESD activation signal. The transient detection circuitry is configured to generate a deactivation signal when the voltage across the first rail and the second rail comprises a voltage change over time that is less than a transient threshold. The deactivation circuitry is configured to deactivate the triggering circuitry based on the deactivation signal.