ESD Clamp Circuit with Dynamic Bias for Ultra-Low Leakage

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Solution Overview

Problem

Ultra-low power wireless sensor node systems face reliability issues due to high leakage currents in existing electrostatic discharge (ESD) clamp circuits, which are unsuitable for systems with constrained battery sizes and low power budgets, compromising their reliability.

Innovation Solution

The development of ultra-low leakage ESD circuits using special biasing structures to reduce subthreshold leakage and gate-induced drain leakage (GIDL) while maintaining ESD protection, incorporating a detection circuit, bias circuit, and shunting circuit with MOS-based transistors and diode-connected MOSFETs to manage bias voltages effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ESD clamp circuits are used, then ESD protection is provided, but leakage current is high (10 nA to 10 pA)

Engineering Contradiction:
ImproveESD protectionVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The bias voltage applied to the shunt transistor gate is dynamically adjusted based on ESD event detection. During normal operation, a reduced bias voltage (VDD/2) minimizes leakage current. Upon detecting an ESD event, the bias voltage is increased to VDD to enable effective discharge, thus adapting the protection mechanism to operational conditions and resolving the contradiction between continuous protection and low leakage.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the bias voltage parameter from a fixed high value to a dynamically controlled value that switches between VDD/2 (low leakage state) and VDD (protection state). This parameter change allows the circuit to maintain ESD protection capability while minimizing leakage current during normal operation, directly addressing the technical contradiction.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If wide shunt transistors are used for ESD protection, then ESD robustness is improved, but subthreshold leakage and GIDL increase

Engineering Contradiction:
ImproveESD robustnessVSAvoidsubthreshold leakage and GIDL
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The detection circuit performs preliminary detection of ESD events before full discharge is initiated. By detecting voltage changes on the power supply node early, the system can prepare the shunt transistor for discharge only when necessary, avoiding continuous high leakage associated with always-on wide transistors while maintaining readiness for ESD protection.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The bias circuit acts as an intermediary between the detection circuit and the shunt transistor. It translates detection signals into appropriate bias voltages, enabling the wide shunt transistor to operate with minimal leakage during normal conditions while maintaining full ESD protection capability when needed, thus mediating between protection requirements and leakage reduction.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9716381B2Electrostatic discharge clamp circuit for ultra-low power applications
Publication Date: 2017.07.25 THE RGT UNIV OF MICHIGAN
  • US9716381B2 patent drawing
  • US9716381B2 patent drawing
  • US9716381B2 patent drawing

AI summary

An electrostatic discharge clamp circuit is provided for low power applications. The clamp circuit includes: a detection circuit, a bias circuit and a shunting circuit having at least one shunt transistor. The detection circuit is configured to detect an occurrence of an electrostatic charge on a power supply node and trigger discharge of the electrostatic charge through the shunting circuit. The bias circuit is coupled between the detection circuit and the shunting circuit and applies a bias voltage to the gate terminal of the shunt transistor. During an electrostatic discharge event, the bias circuit is configured to generate a bias voltage that is substantially equal to the supply voltage; whereas, during the absence of an electrostatic discharge event, the bias circuit is configured to generate a bias voltage that is substantially half of the supply voltage.