ESD Clamp Circuit with Feedback Transistor for Fast Turn-On
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Solution Overview
Problem
Conventional ESD protection circuits for small-feature-sized integrated circuits have insufficient turn-on time to effectively discharge electrostatic discharge (ESD) current, leading to potential damage to core circuitry, and increasing the value of resistors and capacitors to extend discharge time increases silicon area and leakage current.
Innovation Solution
An active ESD clamp circuit with a power supply, ground supply, ESD detection transistor, capacitor, clamp transistor, inverter, and feedback transistor, where the feedback transistor and inverter configuration reduces trigger time and increases turn-on speed of the clamp transistor, allowing for extended ESD current discharge without significant leakage or area increase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If the value of resistor and capacitor is increased to extend discharge time, then the turn-on time of ESD protection circuit is improved, but the silicon area and leakage current are increased
Solution Approach 1:
The patent changes the parameters of the circuit by using a feedback transistor to control the discharge path of the capacitor. Instead of simply increasing the capacitor value to extend turn-on time, the feedback transistor dynamically adjusts the discharge behavior, maintaining sufficient turn-on time while using a smaller capacitor value, thus reducing silicon area.
2Duration of action of moving object
If the value of resistor and capacitor is increased to extend discharge time, then the turn-on time of ESD protection circuit is improved, but the leakage current is increased
Solution Approach 1:
The patent employs a feedback transistor that monitors the voltage across the capacitor and adjusts the discharge path accordingly. This feedback mechanism ensures that the capacitor discharges through an optimized path that maintains the necessary turn-on time while minimizing leakage current during normal operation.
Solution Approach 2:
The feedback transistor introduces dynamic control to the capacitor discharge process. During ESD events, the transistor configuration changes to extend the discharge time, while during normal operation, it maintains a low-leakage state. This dynamic behavior allows the circuit to achieve long turn-on time without proportionally increasing leakage current.
3Duration of action of moving object
If conventional RC circuit is used to detect ESD event, then the ESD current discharge duration is extended, but the silicon area and leakage current are significantly increased
Solution Approach 1:
The patent merges the ESD detection function and the discharge timing control into a single integrated circuit structure. The feedback transistor serves dual purposes: it detects ESD events through voltage monitoring and simultaneously controls the discharge timing, eliminating the need for separate large-value RC components and reducing overall circuit complexity.
Data Source
AI summary
An ESD clamp circuit includes a power supply, a ground supply, an ESD detection transistor, a capacitor having a first terminal connected to the power supply and a second terminal connected to a gate of the ESD detection transistor, and a first resistor connected in series with the capacitor between the power and ground supplies. The ESD clamp circuit also includes a clamp transistor having a first terminal connected to the power supply and a second terminal connected to the ground terminal, an inverter having an input connected to a first terminal of the ESD detection transistor and an output connected to the gate of the clamp transistor, a feedback transistor connected across the inverter, and a second resistor having a first terminal connected to the gate of the clamp transistor and to a second terminal to the ground supply.