Power Supply Clamp Circuit for ESD Protection in Low-Voltage Semiconductors
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Solution Overview
Problem
The trend towards thinner oxide films in MOS transistors for low power consumption and fast speed in semiconductor devices has reduced the destruction voltage resistance, necessitating the development of an ESD protection circuit that operates at low voltages and is integrated into a power supply circuit to prevent damage from electrostatic discharges.
Innovation Solution
A power supply circuit with an ESD protection circuit that includes a current path circuit and a control circuit, utilizing a P-channel MOS transistor and diodes to control the potential of the power supply line, ensuring it remains below the breakdown voltage during ESD events, thereby preventing damage to internal circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the oxide film is made thinner to achieve low power consumption and fast speed, then power consumption is reduced and speed is improved, but the destruction voltage resistance decreases
Solution Approach 1:
The patent introduces a power supply clamp circuit as an intermediary component between the power supply line and ground. This clamp circuit includes a clamp transistor that activates during ESD events to provide a low-impedance discharge path, effectively mediating the protection function without interfering with normal thin-oxide transistor operation during standard processing modes.
2Speed
If the oxide film is made thinner to achieve fast speed, then speed is improved, but the destruction voltage resistance decreases
Solution Approach 1:
The power supply clamp circuit serves as a mediator that provides ESD protection specifically during transient events. The clamp transistor remains inactive during normal fast switching operations, allowing thin-oxide transistors to operate at high speeds, but activates automatically when ESD voltage exceeds the breakdown threshold, providing protection without compromising speed performance.
Solution Approach 2:
The clamp transistor operates dynamically by switching between cutoff and saturation modes based on the voltage condition. During normal operation, it remains in cutoff mode with high impedance, allowing fast signal transitions. During ESD events, it rapidly switches to saturation mode with low impedance to clamp the voltage, providing adaptive protection that responds to changing voltage conditions.
3Reliability
If a power supply clamp circuit is added to protect against ESD, then reliability is improved, but device complexity increases
Solution Approach 1:
The power supply clamp circuit is merged with the existing power supply network by connecting the clamp transistor in parallel between the power supply line and ground. This integration approach allows ESD protection functionality to be added without creating a separate independent protection system, reducing overall device complexity while maintaining reliability.
Solution Approach 2:
The clamp transistor is configured to automatically activate when the power supply voltage exceeds the breakdown voltage threshold during ESD events, without requiring external control signals or complex control logic. The circuit serves itself by using the voltage condition to trigger its own protection action, simplifying the overall system while improving reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively discharges ESD pulses to the ground, preventing excessive voltage from reaching internal circuits and ensuring stable operation even at low power supply voltages, thus protecting semiconductor devices from electrostatic damage.
Implementation Method 1
One of reliability test items of semiconductor devices is an Electro-Static Discharge (ESD) destruction test
Implementation Method 2
controls a potential of the first power supply line such that the potential of the first power supply line becomes a potential lower than the first voltage
Data Source
AI summary
A power supply circuit includes a first circuit connected to a first line, to which a power supply voltage is applied, and a second line, and a power supply clamp circuit connected to the first and second lines. The power supply clamp circuit includes a current path circuit which connects the first and the second lines to each other, and a control circuit which outputs a control signal to the current path circuit. The current path circuit includes a transistor and a diode group. The power supply clamp circuit is driven during a period in which a first voltage is applied to the first line and controls a potential of the first line so as to become a potential lower than the first voltage.