ESD Power Clamp Circuit Using Source-Bulk Bias to Suppress Leakage
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Solution Overview
Problem
Current ESD power clamp devices using bigFETs face limitations due to current leakage, which becomes more significant as integrated circuit manufacturing scales down, affecting their protection performance.
Innovation Solution
The introduction of an impedance element, such as a diode, resistor, or inductor, between the source and bulk terminals of the FET in the ESD power clamp device creates a source-bulk voltage, enlarging the depletion region and increasing the threshold voltage to suppress leakage current without increasing the device's size or cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bigFET is used in ESD power clamp device, then ESD protection performance is improved, but current leakage increases
Solution Approach 1:
An impedance element is introduced as an intermediary component between the source terminal and bulk terminal of the bigFET. This impedance element generates a source-bulk voltage that creates a depletion region at the source-bulk junction, which acts as a barrier to suppress leakage current while preserving the ESD protection capability of the bigFET
Solution Approach 2:
The invention changes the electrical parameters of the bigFET by introducing a source-bulk voltage through the impedance element. This voltage modification alters the depletion region characteristics and threshold voltage of the FET, thereby suppressing leakage current without compromising ESD protection performance
2Volume of moving object
If manufacturing process scales down, then device size is reduced, but current leakage becomes more significant
Solution Approach 1:
The impedance element serves as a mediator that addresses the leakage issue in scaled-down devices. By generating source-bulk voltage, it creates a depletion region that effectively suppresses leakage current even in smaller device geometries where leakage becomes more pronounced
Solution Approach 2:
The invention modifies electrical parameters (source-bulk voltage, threshold voltage) to compensate for the increased leakage tendency in scaled-down devices, maintaining performance without increasing physical dimensions
3Object-generated harmful factors
If impedance element is added to suppress leakage current, then leakage current is reduced, but device complexity increases
Solution Approach 1:
The impedance element performs multiple functions: it generates source-bulk voltage to suppress leakage current, creates depletion region to block leakage paths, and maintains compatibility with standard CMOS fabrication processes. This multi-functionality justifies the added component
Solution Approach 2:
By modifying electrical parameters through the impedance element rather than changing physical structure, the invention achieves leakage suppression with minimal impact on device complexity. The approach uses electrical parameter adjustment instead of structural modification
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively enhances ESD protection performance by reducing leakage current in the FET, thereby improving the overall protection capabilities of the power clamp device while maintaining its size and cost efficiency.
Implementation Method 1
creates a source-bulk voltage, enlarging the depletion region and increasing the threshold voltage to suppress leakage current
Implementation Method 2
The generated source-bulk voltage causes enlarged depletion region between the source and drain of the FET, and thus, increases the threshold voltage and suppresses the leakage current
Data Source
AI summary
An ESD power clamp device includes an ESD detection circuit; a controlling circuit coupled with the ESD detection circuit; a field effect transistor (FET) coupled with the controlling circuit, and an impedance element coupled with the FET. The FET includes a drain terminal coupled with a first supply node; a gate terminal coupled with the controlling circuit; a source terminal coupled with a second supply node via the impedance element; and a bulk terminal coupled with second supply node.