ESD Detection Circuit Biasing for Leakage Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional ESD protection circuits using nano scale processes suffer from excessive leakage current due to thin gate oxide thickness, leading to incorrect ESD trigger signals and malfunction, especially when no ESD event occurs.

Innovation Solution

An ESD detection circuit is designed with a bias circuit that indirectly couples to the ground terminal, providing a bias voltage to reduce the voltage difference across the MOS capacitor, thereby eliminating unwanted leakage current and ensuring accurate ESD trigger signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a MOS capacitor complying with nano scale process is used in the ESD detection circuit, then the circuit area and cost are reduced, but excessive leakage current occurs due to thin gate oxide thickness

Engineering Contradiction:
Improvecircuit areaVSAvoidleakage current
Core Design Contradiction:
Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

A bias circuit is introduced as an intermediary component between the MOS capacitor and the power clamp circuit. This bias circuit generates a bias voltage that is applied to the second terminal of the MOS capacitor, serving as a mediator to reduce the voltage difference across the capacitor and thereby eliminate excessive leakage current while preserving the nano-scale MOS capacitor's area advantages

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the voltage difference across the MOS capacitor is large, then the ESD detection sensitivity is improved, but excessive leakage current occurs due to thin gate oxide thickness

Engineering Contradiction:
ImproveESD detection sensitivityVSAvoidleakage current
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The bias circuit dynamically adjusts the voltage parameter applied to the second terminal of the MOS capacitor. By changing the bias voltage level, the voltage difference across the MOS capacitor is optimized to maintain adequate ESD detection sensitivity while reducing it enough to eliminate excessive leakage current through the thin gate oxide

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If the ESD detection circuit is directly coupled to ground terminal, then the circuit complexity is reduced, but leakage current causes erroneous ESD trigger signals

Engineering Contradiction:
Improvecircuit complexityVSAvoidESD trigger signal accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The bias circuit serves as an intermediary between the ESD detection circuit and the ground terminal, indirectly coupling the system to ground. This intermediary structure adds minimal complexity but significantly improves reliability by preventing leakage current from causing erroneous ESD trigger signals through proper voltage level management

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively eliminates leakage current in ESD detection circuits during non-ESD events, enhancing the reliability of ESD protection circuits by maintaining the PMOS transistor in an off state and preventing erroneous triggering of power clamp circuits.

Implementation Method 1

The bias circuit is coupled between the first power pad and the second power pad and is implemented for providing a bias voltage to the second terminal

Methodology Applied
Scientific EffectVoltage biasing: Electric Field

Implementation Method 2

The RC circuit includes an impedance component and a MOS capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7884617B2ESD detection circuit and related method thereof
Publication Date: 2011.02.08 FARADAY TECH CORP
  • US7884617B2 patent drawing
  • US7884617B2 patent drawing
  • US7884617B2 patent drawing

AI summary

An electro-static discharge (ESD) detection circuit is provided. The ESD detection circuit includes: a first power pad for receiving a first supply voltage; a second power pad for receiving a second supply voltage; an RC circuit having an impedance component coupled between the first power pad and a first terminal and having an capacitive component coupled between the first terminal and a second terminal, wherein the second terminal is not directly connected to the second supply voltage; a trigger circuit couples to the first power pad, the second power pad, and the RC circuit, for generating an ESD trigger signal according to a voltage level at the first terminal and a voltage level at the second terminal, and a bias circuit coupled between the first power pad and the second power pad for providing a bias voltage to the second terminal.