ESD Detector Circuit Using Non-Volatile Memory for CDM Event Measurement
Solution Overview
Problem
Integrated circuits become increasingly sensitive to electrostatic discharge (ESD) events during manufacturing and testing, with charged-device model (CDM) ESD events being a common cause of damage due to their rapid nature and high current levels, which can generate gate oxide damaging voltages.
Innovation Solution
A test microelectronic package with integrated ESD detector circuits, including CMOS, NMOS, PMOS, or GaN devices, that measures and records ESD events using non-volatile memory (NVM) devices like thin film storage (TFS) bitcells to detect and quantify CDM-type ESD events, allowing for identification of process issues and risk assessment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If normal flash erase times are used, then the memory device can be programmed and erased, but the erase time is much longer than the 1 ns duration of a charged-device model ESD pulse
Solution Approach 1:
The memory cell is pre-programmed to a known state before the ESD event. This preliminary state allows the cell to respond predictably to the ESD pulse, enabling accurate measurement of the pulse's effect despite the brief duration. The pre-programmed state serves as a reference point for detecting changes caused by the ESD event.
Solution Approach 2:
The invention changes the operating parameters of the memory cell by using specific read and erase voltages that are optimized for detecting ESD effects rather than for normal programming/erasing operations. By adjusting voltage parameters and measurement timing, the system can detect ESD pulse effects that occur on nanosecond timescales.
2Measurement precision
If the integrated circuit is made more sensitive to detect smaller ESD events, then measurement precision improves, but the circuit becomes more vulnerable to damage from ESD events
Solution Approach 1:
The memory cell acts as an intermediary element that transfers the ESD pulse information to a measurable state without being in the direct path of the high-current ESD event. The memory cell's threshold voltage change serves as a proxy measurement, allowing detection of ESD events while protecting the sensitive measurement circuitry from direct exposure to damaging currents.
Solution Approach 2:
The detector circuit uses a dedicated memory cell that can be sacrificed or reset after detecting an ESD event. This allows the use of highly sensitive detection mechanisms in the memory cell without risking damage to the main integrated circuit, as the memory cell can be reprogrammed or replaced if needed.
3Reliability
If a robust ESD detection circuit is designed to withstand high currents, then reliability improves, but the circuit complexity increases
Solution Approach 1:
The detection function is extracted from the main integrated circuit and placed in a separate, dedicated detector circuit with its own memory cell. This separation allows the detector to be optimized for ESD detection without compromising the main circuit's functionality, and the detector can be independently protected or reset after an ESD event.
Solution Approach 2:
The ESD detection system is segmented into distinct functional blocks: the memory cell for sensing, the detector circuit for processing, and the main integrated circuit being protected. This segmentation allows each component to be optimized for its specific function and facilitates independent testing and replacement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively measures and records ESD events, providing spatial information on occurrence and magnitude, thereby identifying and mitigating process-related damage risks, and can be reused multiple times.
Implementation Method 1
An electrostatic discharge measuring device includes an integrated circuit including at least one electrostatic discharge (ESD) detector circuit
Data Source
AI summary
An electrostatic discharge measuring device includes an integrated circuit including a collector, a discharge pad and an ESD detector circuit coupled to the collector and discharge pad. The ESD detector circuit includes a device that detects occurrence and magnitude of an electrostatic discharge between the collector and the discharge pad. In one embodiment, the device is a metal-oxide-semiconductor capacitor. In another embodiment, the device is a thin film storage bitcell. In one embodiment, the electrostatic discharge measuring device is contained in a test microelectronic package. A method includes running the test microelectronic package through a manufacturing process to determine location during manufacturing at which an electrostatic discharge occurs when an externally-similar production microelectronic packages is run through the same manufacturing process.