ESD Protection Diode With Pnpn Thyristor Structure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current ESD protection diodes face challenges in reducing residual current to protected devices due to high clamp voltage and dynamic resistance, particularly in devices with input/output terminals like HDMI, which can lead to latch-up issues and require multiple types of diodes with different hold voltages, increasing component costs.
Innovation Solution
A semiconductor device with a pnpn thyristor structure and npn transistor structure is designed, allowing the same diode to function as both by changing connection direction, thereby achieving two hold voltages without increasing component types, and incorporating a p-type first barrier region to suppress leakage current and adjust impurity concentrations for optimal breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the hold voltage is reduced to reduce clamp voltage and residual current, then the ESD protection performance is improved, but latch-up occurs in the ESD protection diode when protecting input/output terminals capable of driving current
Solution Approach 1:
The patent applies parameter changes by adjusting the impurity concentrations in the pnpn thyristor structure. Specifically, it sets the impurity concentration in the n-type cathode region to be higher than in the p-type anode region, and optimizes the impurity concentrations in the barrier regions to control the breakdown voltage and hold voltage within specific ranges. This resolves the contradiction by finding optimal parameter values that provide sufficient ESD protection while preventing latch-up in current-driving terminals.
2Reliability
If different types of ESD protection diodes with different hold voltages are used according to input/output terminal types, then the protection performance is optimized, but the device complexity and component variety increase
Solution Approach 1:
The patent applies universality by designing a single ESD protection diode structure that can function for different types of input/output terminals. By optimizing the pnpn thyristor structure with specific impurity concentration ratios and breakdown voltage control, the same diode structure can protect both high-current terminals (like HDMI) and low-current terminals, eliminating the need for multiple specialized diode types.
Solution Approach 2:
The patent uses parameter changes to make the ESD protection diode adaptable to different terminal types. By controlling the breakdown voltage to be higher than the signal level for current-driving terminals and adjusting the hold voltage through impurity concentration optimization, a single diode design can serve multiple terminal types without requiring separate specialized components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of components needed, lowers costs, and maintains signal quality by achieving appropriate breakdown voltages and reducing dynamic resistance, while preventing latch-up and signal deterioration.
Implementation Method 1
a thyristor structure or a transistor structure having snapback characteristics is used as the ESD protection diode. In particular, in the ESD protection diode having the thyristor structure, a hold voltage is low at the time of a snapback operation.
Implementation Method 2
In this case, it is effective to terminate a pn junction in a semiconductor layer. In a case in which a pn junction is terminated in a semiconductor layer, leakage current flows in the semiconductor layer. Therefore, it is necessary to provide a barrier region having impedance in a semiconductor layer in which a pn junction is terminated.
Data Source
AI summary
A semiconductor device according to an embodiment includes a semiconductor layer that has first and second plane and includes first-conductivity-type first semiconductor region, second-conductivity-type second semiconductor region between the first semiconductor region and the first plane, first-conductivity-type third semiconductor region between the second semiconductor region and the first plane and has a lower first-conductivity-type impurity concentration than the first semiconductor region, and second-conductivity-type fourth semiconductor region between the third semiconductor region and the first plane and has a higher second-conductivity-type impurity concentration than the second semiconductor region; a first electrode on a side of the first plane of the semiconductor layer and is electrically connected to the third semiconductor region and the fourth semiconductor region; and a second electrode on a side of the second plane of the semiconductor layer, is electrically connected to the first semiconductor region, and is not electrically connected to the second semiconductor region.