ESD Driver Bias Control for Equal Voltage Sharing in Transistors
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Solution Overview
Problem
In semiconductor manufacturing, electrostatic discharge (ESD) protection circuits fail to properly control transistors during ESD events, leading to uneven voltage distribution and potential damage to ESD drivers.
Innovation Solution
The implementation of ESD protection circuits with bias generators and logic circuits that generate bias signals to turn off transistors in ESD drivers during ESD events, ensuring equal voltage sharing across multiple transistors to prevent damage, and the use of secondary bias generators to further distribute voltage drops equally.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If control circuits are used to control transistors during ESD events, then ESD protection function is provided, but the control circuits fail to properly control transistors leading to uneven voltage distribution
Solution Approach 1:
A bias generator circuit is introduced as an intermediary component between the control circuit and the ESD driver transistors. The bias generator produces bias signals that are coupled to the control terminals of the transistors, mediating the control function to ensure proper voltage distribution across the ESD current path during ESD events.
Solution Approach 2:
The invention changes the electrical parameters (bias signals) applied to the control terminals of the transistors. By dynamically adjusting these bias signals based on ESD event detection, the transistor gate voltages are optimized to achieve uniform voltage distribution across multiple transistors in the ESD protection path.
2Power
If multiple transistors are used in ESD drivers, then ESD current handling capability is increased, but uneven voltage distribution causes transistor damage
Solution Approach 1:
The bias generator acts as a mediator that distributes voltage evenly across multiple series-connected transistors. By coupling bias signals to each transistor's control terminal, the system maintains balanced voltage distribution, preventing any single transistor from experiencing excessive stress that would lead to damage.
Solution Approach 2:
The invention creates equipotential conditions across the control terminals of series-connected transistors by applying appropriate bias signals. This ensures that during ESD events, the voltage drops are evenly distributed across all transistors in the ESD driver, preventing localized over-stress and enhancing overall transistor durability.
3Reliability
If bias generators are added to control voltage distribution, then transistor protection is improved, but device complexity increases
Solution Approach 1:
The bias generator functionality is merged with the existing ESD protection circuit architecture. The bias signals are integrated into the control path of the ESD drivers, combining the voltage distribution control function with the existing transistor control structure, thereby minimizing additional complexity while achieving improved protection.
Data Source
AI summary
A device is disclosed herein. The device includes a bias generator, an ESD driver, and a logic circuit. The bias generator includes a first transistor. The ESD driver includes a second transistor and a third transistor coupled to each other in series. The logic circuit is configured to generate a logic control signal. When the first transistor is turned on by a detection signal, the first transistor is turned off.