Multi-Stage ESD/EOS Detection Circuit With Event Memory
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Solution Overview
Problem
Traditional semiconductor designs cannot detect electrostatic discharge (ESD) and electrical overstress (EOS) events, leading to potential chip damage that is only identified during product application, resulting in significant failure rates.
Innovation Solution
An electrostatic discharge and electrical overstress detection circuit is introduced, comprising a protection circuit, sensing circuit, clamp circuit, sampling logic circuits, and a storage circuit, which records ESD and EOS events by sampling voltage changes across multiple stages and storing them in memory cells, allowing for analysis of event occurrence and impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional protection circuits are used, then ESD and EOS damage is prevented, but detection capability is lost
Solution Approach 1:
The protection circuit is segmented into distinct functional modules: a protection circuit for ESD/EOS prevention, a sensing circuit for voltage detection, a clamp circuit for signal conditioning, and a storage circuit for event recording. This segmentation allows each module to specialize in its function while maintaining overall system reliability and adding detection capability.
Solution Approach 2:
A sensing circuit is introduced as an intermediary between the protection circuit and the storage circuit. This intermediary detects voltage changes caused by ESD/EOS events and triggers the appropriate recording action, enabling detection without interfering with the protection function.
2Difficulty of detecting and measuring
If detection capability is added, then ESD and EOS events can be detected, but device complexity increases
Solution Approach 1:
The sensing circuit, clamp circuit, and storage circuit are merged into a unified detection system that shares common signal paths and control logic. This merging reduces overall complexity compared to having completely separate protection and detection systems while maintaining full detection functionality.
Solution Approach 2:
The storage circuit is designed to handle multiple types of events (ESD and EOS) using the same basic structure. The circuit can detect and record different event types through a universal recording mechanism, reducing the need for separate specialized circuits for each event type.
3Measurement precision
If multiple sampling stages are used, then event recording precision is improved, but circuit complexity increases
Solution Approach 1:
The sampling process is segmented into multiple sequential stages, where each stage captures and stores event information in a dedicated memory cell. This segmentation allows precise recording of event characteristics while maintaining a modular circuit structure that is easier to analyze and implement.
Solution Approach 2:
The circuit transitions from temporal sampling to spatial storage by using multiple memory cells arranged in a structured format. Event information is distributed across multiple dimensions (different memory cells) rather than requiring complex temporal processing, simplifying the circuit logic while improving recording precision.
Data Source
AI summary
An electrostatic discharge and electrical overstress detection circuit includes protection circuit, sensing circuit, clamp circuit, several stages of sampling logic circuits connected in sequence and storage circuit. Protection circuit is coupled between input/output pin and internal chip and discharges to a power supply terminal when the electrostatic discharge or electrical overstress events happen. Sensing circuit and clamp circuit are coupled between power supply terminal and ground terminal. Each stage of sampling logic circuit is coupled to power supply terminal and memory cell of storage circuit, and the first stage of sampling logic is coupled to the clamp circuit, and when the electrostatic discharge or electrical overstress events happen, the several stages of sampling logic circuits sample voltage of the power supply terminal one by one and change state of corresponding memory cell, so that the electrostatic discharge or electrical overstress events are successively recorded by the memory cell.