ESD Circuit Feedback Delay for Complete Discharge
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Solution Overview
Problem
Existing electrostatic discharge protection circuits fail to thoroughly discharge static electricity, leading to poor protection effects and potential damage to integrated circuits due to insufficient discharge periods of the discharge transistor.
Innovation Solution
An electrostatic protection circuit with a pulse detection unit, discharge transistor, and a feedback delay circuit that extends the ON period of the discharge transistor, ensuring thorough discharge of static electricity without increasing layout space, and an inverter group to amplify and buffer signals, reducing noise impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the discharge transistor's ON period is extended to ensure thorough electrostatic discharge, then the electrostatic protection effect is improved, but the layout area increases
Solution Approach 1:
The patent employs a feedback delay circuit that uses the discharge transistor's own drain-source voltage as feedback to extend its ON period. The circuit detects when electrostatic discharge occurs and maintains the discharge transistor in ON state for a sufficient duration to completely discharge electrostatic charges, ensuring thorough protection without requiring additional layout space for external timing components.
Solution Approach 2:
The discharge transistor's drain-source voltage directly controls the extension of its own ON period through the feedback delay circuit. The circuit uses the transistor's inherent voltage characteristics to automatically determine when discharge is complete and when to turn OFF, eliminating the need for external control signals or additional timing circuits that would increase layout area.
2Reliability
If the discharge transistor's ON period is extended to ensure thorough electrostatic discharge, then the electrostatic protection effect is improved, but the device complexity increases
Solution Approach 1:
The feedback delay circuit is integrated within the electrostatic protection circuit itself, merging the timing function with the discharge function. By using the discharge transistor's drain-source voltage as both the discharge path control signal and the feedback signal for extending the ON period, the patent eliminates the need for separate timing circuits or external components, thereby reducing overall device complexity while ensuring thorough discharge.
3Productivity
If existing ESD circuit designs focus on layout area and leakage current, then manufacturing efficiency is improved, but electrostatic discharge completeness deteriorates
Solution Approach 1:
The patent introduces a feedback mechanism that monitors the discharge process in real-time through the discharge transistor's drain-source voltage. This feedback automatically extends the discharge transistor's ON period to ensure complete discharge of electrostatic charges, addressing the discharge completeness issue without requiring complex external control systems that would reduce manufacturing efficiency.
Solution Approach 2:
The circuit uses the discharge transistor's own voltage characteristics to automatically control the discharge duration. The drain-source voltage directly triggers and sustains the extended ON period, eliminating the need for external timing circuits or additional control logic, thereby maintaining manufacturing efficiency while achieving complete electrostatic discharge.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures complete discharge of static electricity, preventing damage to functional circuits and reducing the layout space requirements, while maintaining effective electrostatic protection and noise resistance.
Implementation Method 1
a feedback delay circuit configured to extend an ON period of the discharge transistor during the discharge of the electrostatic charges
Implementation Method 2
a discharge transistor with a gate connected to the pulse detection unit, a drain connected to the first pad, and a source connected to the second pad, configured to conduct the source and the drain when static electricity occurs in the first pad or the second pad, so as to discharge electrostatic charges
Data Source
AI summary
The present application relates to electrostatic protection circuit, integrated circuit and electrostatic discharge method. The electrostatic protection circuit includes: pulse detection unit configured to detect an electrostatic pulse, with first terminal connected to first pad, second terminal connected to second pad, and output terminal outputting a detection result signal; discharge transistor with gate connected to the pulse detection unit, drain connected to the first pad, and source connected to the second pad, configured to conduct the source and the drain when static electricity occurs in the first pad or the second pad, to discharge electrostatic charges; and processing unit connected to the pulse detection unit and the discharge transistor, configured to control ON and OFF of the discharge transistor based on the detection result signal, the processing unit including: a feedback delay circuit configured to extend an ON period of the discharge transistor during the discharge of the electrostatic charges.