ESD Protection Circuit With Dynamic Gate Bias for Fast Triggering
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Solution Overview
Problem
Existing ESD protection circuits for integrated circuits face challenges in activating quickly enough to prevent damage from high-voltage electrostatic discharge events, particularly when the threshold voltage is high, leading to potential destruction of internal circuits.
Innovation Solution
The integration of a bias voltage generator that provides a gate bias signal to reduce the threshold voltage of the ESD primary circuit during ESD events, allowing faster activation and ensuring the circuit operates within a reliable voltage range to prevent transistor reliability issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the threshold voltage of the ESD primary circuit is increased, then the transistor reliability is improved, but the activation speed of the ESD primary circuit deteriorates
Solution Approach 1:
The bias voltage generator pre-charges the gate terminal of the ESD primary circuit transistor to a voltage close to the supply voltage before an ESD event occurs. When an ESD event happens, the transistor can activate immediately without waiting to charge up, thus achieving fast activation speed while maintaining high threshold voltage for reliability.
Solution Approach 2:
The gate voltage of the ESD primary circuit transistor is made dynamic rather than static. The bias voltage generator continuously adjusts the gate voltage based on whether an ESD event is detected, providing high voltage during ESD events for fast activation and maintaining transistor reliability under normal conditions.
2Speed
If the threshold voltage of the ESD primary circuit is decreased, then the activation speed is improved, but the transistor reliability deteriorates
Solution Approach 1:
Instead of permanently lowering the threshold voltage, the system pre-charges the gate terminal to a high voltage state before ESD events. This preliminary action enables fast activation when needed without permanently compromising the transistor's reliability by maintaining low threshold voltage.
Solution Approach 2:
The effective threshold voltage is dynamically changed based on operating conditions. The bias voltage generator modifies the gate voltage parameter to create conditions for fast activation during ESD events while maintaining safe operating parameters during normal conditions to ensure transistor reliability.
Data Source
AI summary
An integrated circuit includes a diode string, a first transistor, a second transistor, and a third transistor. The diode string is coupled between a first reference voltage pin and an input/output (I/O) pad. A first terminal of the second transistor is coupled to a first node, and a gate terminal of the second transistor is coupled to a second reference voltage pin. In response to a voltage at the first terminal of the second transistor being higher than a voltage at the gate terminal of the second transistor, the second transistor is configured to turn on the third transistor, and the third transistor is configured to transmit a voltage received from the first reference voltage pin to a gate terminal of the first transistor.