ESD Protection Device With Gate Through-Holes
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Solution Overview
Problem
Integrated circuits (ICs) are vulnerable to damage from electrostatic discharge (ESD) events due to the high voltage and energy involved, which existing ESD protection technologies have not adequately addressed, posing a critical reliability issue as semiconductor manufacturing evolves.
Innovation Solution
An ESD protection device comprising a substrate with doped regions and a gate structure featuring through holes and contacts that increase the holding voltage by allowing multiple contacts to pass through and connect with doped regions, enhancing the device's ability to manage ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection structures are used, then the device can provide basic ESD protection, but the holding voltage is insufficient and the ESD energy dissipation capability is limited
Solution Approach 1:
The gate structure is segmented into multiple sections with through-holes, allowing the gate to be divided into multiple functional regions. This segmentation enables multiple contacts to connect to different doped regions simultaneously, creating multiple current paths for ESD dissipation while maintaining high holding voltage through the segmented architecture.
Solution Approach 2:
The gate structure transitions from a planar two-dimensional configuration to a three-dimensional structure with vertical through-holes. This dimensional change allows contacts to pass through the gate and reach doped regions at different vertical levels, enabling multiple contacts to connect to different doped regions and thereby increasing holding voltage and ESD energy dissipation capability.
2Ease of manufacture
If the ESD protection structure is simplified, then the manufacturing process is easier, but the ability to withstand ESD levels is reduced
Solution Approach 1:
The gate structure serves multiple functions simultaneously: it provides electrical connection through the through-holes, defines doped regions through the contacts, and enables high holding voltage through its multi-contact architecture. This multi-functionality allows a single structure to achieve complex ESD protection capabilities without proportionally increasing manufacturing complexity.
3Reliability
If multiple contacts are used to increase holding voltage, then the ESD energy dissipation improves, but the device complexity increases
Solution Approach 1:
Multiple contacts are merged into a single gate structure with integrated through-holes. Instead of separate contact structures for each doped region, the gate consolidates multiple connection points into one unified structure, allowing multiple contacts to pass through the same gate to reach different doped regions. This merging reduces overall device complexity while maintaining the ESD energy dissipation benefits of multiple contacts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed ESD protection device effectively increases the holding voltage, enabling better management and dissipation of ESD energy, thereby protecting ICs from damage.
Implementation Method 1
When the input terminal receives high voltage electrostatic charges and the output terminal is grounded, the electrostatic charges passes through the IC and is released to the ground. The release process is referred to as an ESD event.
Implementation Method 2
The contacts pass through the first through hole to contact with the third doped region, enabling multiple current paths for ESD energy dissipation.
Data Source
AI summary
An electrostatic discharge (ESD) protection device including a substrate, a first doped region, a second doped region, and a third doped region, a gate and a plurality of contacts is disclosed. The substrate includes a first conductive type. The first doped region is formed in the substrate and includes a second conductive type. The second doped region is formed in the substrate and includes the second conductive type. The third doped region is formed in the substrate, includes the first conductive type and is located between the first and the second doped regions. The gate is formed on the substrate, located between the first and the second doped regions and comprises a first through hole. The contacts pass through the first through hole to contact with the third doped region.