ESD Mitigation for Touch Displays via Independent Panel Updates
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Solution Overview
Problem
Electronic displays, particularly those with micro-LED technology, are vulnerable to electrostatic discharge (ESD) which can cause visual artifacts, inaccurate touch detection, and processing issues, leading to a negative user experience and increased resource consumption.
Innovation Solution
The implementation of electrostatic discharge mitigation systems that include configuration panel updates independent of image refresh rates, improved circuit resiliency, pin corruption detection, and supply injection detection to reset corrupted configurations and protect memory from ESD effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If analog and digital circuits are included inside the display panel to improve display characteristics, then display quality is improved, but vulnerability to electrostatic discharge increases
Solution Approach 1:
The patent introduces an electrostatic discharge mitigation system that acts as an intermediary between the vulnerable digital circuits and the external environment. Detection circuitry monitors for ESD events, and mitigation circuitry provides a controlled path for discharge, protecting the internal digital circuits while allowing the panel to maintain its advanced functionality.
Solution Approach 2:
The patent implements protective measures before ESD damage can occur. Detection circuitry continuously monitors for ESD conditions, and mitigation circuitry is pre-positioned to provide discharge paths and protection mechanisms that activate automatically when ESD events are detected, cushioning the vulnerable circuits from damage.
2Reliability
If electrostatic discharge mitigation systems are implemented to protect display panel circuits, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent divides the ESD mitigation system into separate functional segments: detection circuitry that monitors for ESD events, mitigation circuitry that provides discharge paths and protection, and control logic that coordinates the response. This segmentation allows each component to be optimized independently and simplifies the overall design and implementation.
3Productivity
If configuration panel updates are performed independent of image refresh rates to mitigate ESD effects, then processing efficiency is improved, but energy consumption increases
Solution Approach 1:
The patent implements periodic configuration panel updates that are synchronized with the display refresh rate. This periodic action ensures that ESD mitigation is applied at appropriate intervals without requiring continuous updates, thereby maintaining processing efficiency while reducing energy consumption compared to continuous mitigation approaches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These systems effectively reduce the impact of ESD on electronic displays, improving user experience and processing efficiency by minimizing visual artifacts and resource consumption, while preventing corruption of processing circuitry and flex cable connections.
Implementation Method 1
electrostatic discharge may result when a display is at a relatively high level of static voltage and a tactile input is received, causing an injected current to transit via the display panel
Data Source
AI summary
Touch sensitive display technologies (e.g., integrated touch-display pixel-based systems) are evolving to contain more analog and digital circuits inside the panel itself instead of the traditionally simple thin-film transistors. This improves the display characteristics but makes those circuits more vulnerable to the impact of external ESD strikes, which can degrade the user experience. This disclosure describes a series of circuits and techniques to mitigate the impact of these discharges on front of screen artifacts and potential false touches. These circuits and techniques may include: performing configuration-only panel updates independently of the image refresh rate, improving the in-panel memory circuits to make them resistant to unexpected pin toggles via disabling of a write path in response to a read clock, implementing a pin corruption detector and implementing a supply injection detector.