ESD Protection Circuit in 3D NAND Flash for Capacitance Reduction
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Solution Overview
Problem
In three-dimensional NAND flash devices, the high height of the cell region leads to increased coupling capacitance in the electrostatic discharge (ESD) protection circuit, reducing its robustness due to the tall contacts required to handle different voltages.
Innovation Solution
The ESD protection circuit is redesigned with a frame-shaped first electrode region and a patterned second electrode region, featuring lower conductive wirings that correspond to these regions and an uppermost lower conductive wiring to effectively discharge static electricity, reducing coupling capacitance and enhancing robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the cell region height is increased to stack hundreds of memory cells in three-dimensional NAND flash device, then the storage capacity is improved, but the coupling capacitance of the ESD protection circuit increases due to taller contacts, reducing robustness
Solution Approach 1:
The patent transitions from a planar ESD protection circuit layout to a three-dimensional stacked structure where the ESD protection circuit is positioned in the first region and memory cells are stacked in the second region above it. This vertical stacking allows the ESD protection circuit to maintain lower contact heights while still providing protection to the high-density memory cells, thereby reducing coupling capacitance while preserving storage capacity.
Solution Approach 2:
The patent divides the semiconductor device into distinct stacked regions: a first region containing the ESD protection circuit and a second region containing memory cells. This segmentation allows independent optimization of each region - the ESD protection circuit can use shorter contacts with lower capacitance while the memory cell region maintains high stacking density for storage capacity.
2Adaptability or versatility
If taller contacts are used in the ESD protection circuit to handle different voltages in high-height cell region, then the voltage handling capability is improved, but the coupling capacitance increases, decreasing robustness
Solution Approach 1:
By positioning the ESD protection circuit in a separate first region below the memory cell second region, the patent enables the use of shorter vertical contacts that still access multiple voltage levels through the stacked architecture. This reduces the contact height and associated coupling capacitance while maintaining the ability to handle different voltages through the multi-layer structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the robustness of the ESD protection circuit by reducing coupling capacitance and effectively discharging static electricity, thereby enhancing the reliability of the semiconductor integrated circuit device.
Implementation Method 1
an electrostatic discharge (ESD) protection circuit arranged between the cell region and a semiconductor substrate to discharge a static electricity inputted from the pad
Data Source
AI summary
A semiconductor integrated circuit device may include a first region, a second region, a pad structure and an electrostatic discharge (ESD) connection. The first region may be positioned adjacent to a semiconductor substrate. An ESD protection circuit may be integrated in the first region. The second region may be stacked on the first region. A plurality of memory cells may be formed in the second region. The pad structure may be arranged over the second region to receive an external voltage. The ESD connection may include a plurality of lower conductive wirings in the first region. At least one of the lower conductive wirings may be electrically connected with the ESD protection circuit. The at least one of the lower conductive wirings may be drawn to a portion corresponding to the pad structure.