ESD Protection Circuit with DC Blocking Capacitor

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Solution Overview

Problem

Conventional ESD protection circuits for compound semiconductor high frequency circuits are large in size and generate unwanted nonlinear signals, which degrade circuit performance, especially in applications requiring high linearity like mobile communication systems.

Innovation Solution

The integration of a DC blocking capacitor in parallel with a compound semiconductor ESD protection device, utilizing multi-gate E-FETs with specific resistor and capacitor configurations to minimize nonlinear signal generation and reduce chip size, provides effective ESD protection while allowing RF signals to pass through.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ESD protection circuits are used, then ESD protection is provided, but the circuit size becomes large and nonlinear signals are generated

Engineering Contradiction:
ImproveESD protectionVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the ESD protection device with a DC blocking capacitor into a single integrated circuit block. This merging eliminates the need for separate ESD protection circuits, thereby reducing overall circuit size while maintaining ESD protection functionality. The integrated design allows the ESD device to share physical and electrical space with the capacitor, directly addressing the area constraint.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ESD protection device is designed to serve multiple functions: it provides ESD protection, blocks DC signals, and allows RF signals to pass through with minimal nonlinear distortion. By making the ESD device multi-functional, the patent eliminates the need for additional separate components, thereby reducing circuit size without compromising protection or signal integrity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If conventional ESD protection circuits are used, then ESD protection is provided, but unwanted nonlinear signals are generated that degrade circuit performance

Engineering Contradiction:
ImproveESD protectionVSAvoidnonlinear signal
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent modifies the electrical parameters of the ESD protection device by integrating it with a DC blocking capacitor. This changes the voltage and current characteristics across the ESD device, operating it in a region that minimizes nonlinear signal generation. The parameter changes allow the ESD device to provide protection while maintaining high linearity and reducing harmful nonlinear distortions.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the number of series connected E-FET diodes is increased to meet voltage requirements, then ESD protection is improved, but the area occupied by the ESD protection device becomes large

Engineering Contradiction:
ImproveESD protectionVSAvoidESD protection device area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of using multiple series-connected E-FET diodes to achieve the required voltage rating, the patent merges the ESD protection device with a DC blocking capacitor. This integration allows a single ESD device to achieve the equivalent protection of multiple series diodes while occupying less area, as the capacitor provides the voltage multiplication effect electrically rather than requiring physical series connection of multiple devices.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the overall module size and minimizes nonlinear signal generation, enhancing the linearity and performance of high frequency circuits by providing a compact and efficient ESD protection solution.

Implementation Method 1

a DC blocking capacitor connected between a first point and a second point

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

An ESD event may produce high current or high voltage pulses within a few nanoseconds

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Implementation Method 3

the ESD protection device provides a path for an ESD current

Methodology Applied
Scientific EffectConduction (electrical): Conduction (electrical)

Data Source

PatentUS9064704B2Integrated circuits with ESD protection devices
Publication Date: 2015.06.23 WIN SEMICON
  • US9064704B2 patent drawing
  • US9064704B2 patent drawing
  • US9064704B2 patent drawing

AI summary

An integrated circuit with ESD protection comprises at least one ESD protection circuit block, which comprises a DC blocking capacitor connected in parallel with at least one compound semiconductor enhancement mode FET as an ESD protection device. The ESD protection circuit block that is built in an integrated circuit provides ESD protection while minimizing the generation of unwanted nonlinear signals resulting from the ESD protection. An integrated circuit comprises a high frequency circuit, a switching element, and two ESD protection circuit blocks, in which the high frequency circuit is connected between a first terminal and a second terminal for inputting or outputting the RF signals, the first ESD protection circuit block is connected from a branch node between the first terminal and the high frequency circuit to the switching element, and the second ESD protection circuit block is connected from the switching element to the ground.