ESD Protection Circuit Parallel Discharge Paths
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
LCD panels face significant damage from electrostatic discharge (ESD) due to limited discharge paths and high equivalent resistance in existing ESD protection circuits, which can lead to damage of internal lines and components.
Innovation Solution
An ESD protection circuit is designed with a first switch, a capacitor, and a third switch, where the capacitor adjusts the potential of a node to open the switches, allowing static electricity to discharge through the first and third switches to the ground and level lines, increasing the discharge path and current magnitude.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If equivalent diode assemblies are used in the ESD protection circuit, then the circuit can discharge positive or negative voltage through unilateral connection characteristic, but the thin high level line and low level line form relatively great equivalent resistance, resulting in relatively small discharge current
Solution Approach 1:
The patent divides the single discharge path into multiple parallel discharge paths by introducing first and second discharge units. Each unit contains equivalent diode assemblies connected to different voltage level lines, creating segmented discharge routes that reduce equivalent resistance and increase discharge current capacity
Solution Approach 2:
The patent transitions from a single-dimensional discharge path to a multi-dimensional discharge network by adding discharge units connected to different voltage level lines (VGH1, VGH2, VGL1, VGL2). This dimensional expansion of the discharge path topology reduces resistance and increases current capacity
2Device complexity
If the high level line and low level line are made thin, then the circuit structure is simpler, but the lines connected to upper and lower ends of the equivalent diode assemblies form relatively great equivalent resistance
Solution Approach 1:
The patent segments the discharge function across multiple parallel paths with different voltage level connections. This segmentation allows each path to contribute to the total discharge current, effectively reducing the equivalent resistance without requiring any single line to be thicker
Solution Approach 2:
The patent merges multiple discharge units in parallel, each connected to different voltage level lines. This merging of parallel paths reduces the overall equivalent resistance of the discharge circuit, enabling higher discharge current while maintaining simple thin line structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the discharge rate and quantity of ESD, preventing damage to internal components and improving the reliability of the LCD panel, while being easily implementable across various panel sizes.
Implementation Method 1
a capacitor electrically coupled between the first node and the signal input node; wherein the signal input node obtained a static electricity, the potential of the static electricity is incompatible with a potential of the second level line, the capacitor is voltage-regulated due to the static electricity to adjust a potential of the first node
Implementation Method 2
the static electricity passes through the first switch and the third switch to discharge towards the ground node and the first level line
Data Source
AI summary
This application relates to an electrostatic discharge (ESD) protection circuit, includes: a first switch, electrically coupled to a first node through a control end, electrically coupled to a ground node through a first end, and electrically coupled to a signal input node through a second end; a capacitor electrically coupled between the first node and the signal input node; a second switch, electrically coupled to a low level line through a control end and a first end, and electrically coupled to the signal input node through a second end; and a third switch, electrically coupled to a high level line through a control end, and electrically coupled to the first node through a first end, being electrically coupled to the low level line through a second end.