ESD Protection Circuit with SCR Triggering
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ESD protection circuits face challenges in protecting internal circuits from electrostatic discharge (ESD) due to lowered avalanche breakdown voltage of gate oxides, leading to potential damage during semiconductor fabricating processes, and existing designs either waste chip layout area or trigger prematurely.
Innovation Solution
An ESD protection circuit comprising a pad, a first transistor, a second transistor, a resistance element, and a diode, where the diode acts as a capacitor and the second transistor as a resistor, lowering the trigger voltage and enhancing ESD ability by forming a silicon-controlled rectifier (SCR) to provide advanced protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the avalanche breakdown voltage of gate oxide is lowered to meet semiconductor fabricating process requirements, then the gate oxide thickness can be reduced, but the internal circuit becomes vulnerable to ESD damage
Solution Approach 1:
The ESD protection circuit is designed to trigger in advance before ESD reaches the internal circuit. The protection element activates at a lower voltage threshold, preemptively establishing a discharge path that diverts ESD current away from vulnerable internal circuits, thus protecting them before damage can occur.
Solution Approach 2:
The patent introduces an intermediate ESD protection circuit between the external pad and the internal circuit. This intermediary structure includes a protection element that activates at lower voltage to intercept and divert ESD current, preventing it from reaching the internal circuit while allowing normal signal transmission.
2Reliability
If a conventional ESD protection circuit is used, then the internal circuit can be protected from ESD, but the trigger voltage is too high causing delayed protection response
Solution Approach 1:
The patent modifies the trigger voltage parameter of the protection element by adjusting its structural parameters and material properties. The protection element is designed with specific doping concentrations and geometric dimensions that lower its breakdown voltage, enabling it to trigger at a lower voltage threshold and respond faster to ESD events.
3Reliability
If transistor capacitance is increased to improve ESD protection, then the protection response can be enhanced, but the chip layout area increases
Solution Approach 1:
The patent combines the ESD protection function with the existing transistor structure. The protection element utilizes the transistor's inherent parasitic capacitance and integrates it into the transistor's fabrication process, eliminating the need for separate dedicated capacitance structures and reducing overall chip area while maintaining ESD protection capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed circuit effectively lowers the trigger voltage for ESD protection, enhances ESD capability, and reduces chip layout area, providing robust protection against ESD while maintaining efficient operation.
Implementation Method 1
the diode acts as a capacitor
Implementation Method 2
A parasitic capacitance (not shown) exists between the drain and the gate of the N-type transistor 250. Therefore, once the pad 20 receives a positive charge high voltage 210, a small positive voltage is induced on the second terminal of the parasitic capacitance, thus a voltage drop is generated between the gate and the source of the N-type transistor 250 and turns on it.
Implementation Method 3
when the high voltage 110 exceeds an avalanche breakdown voltage between the drain and a bulk substrate, the junction between the drain of the N-type transistor 100 and the bulk substrate is broken down, and the generated basic current triggers the parasitic lateral NPN BJT (bipolar junction transistor) of the N-type transistor
Data Source
AI summary
An electrostatic discharge protection circuit comprises a pad, a first transistor, a second transistor, and a diode. Wherein, the first transistor comprises the gate, a first source-drain, and a second source-drain. The first source-drain of the first transistor is electrically coupled to the pad, and the second source-drain of the first transistor is electrically coupled to a first power line. The first source-drain of the second transistor is electrically coupled to the gate of the first transistor, the second source-drain of the second transistor is electrically coupled to the first power line, and the gate of the second transistor is electrically coupled to a second power line. The diode includes a first terminal coupled to the gate of the first transistor, and a second terminal coupled to the pad. In addition, the diode and the first transistor together form a silicon controlled rectifier (SCR).