ESD Protection Diode With Multiple Discharge Paths
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Solution Overview
Problem
Existing ESD protection diodes using Silicon Controller Rectifiers (SCRs) are limited by having only a single discharge path and require adjustment of trigger and holding voltages to match different electronic devices, which can lead to inadequate protection against static electricity.
Innovation Solution
An ESD protection diode with multiple discharge paths is designed, incorporating a base substrate and multiple wells of different types (N-type and P-type) with specific diffusion regions to form transistors that activate at varying voltage levels, creating multiple discharge paths and adjustable trigger and holding voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a typical SCR-based ESD protection diode is used, then the device is easily miniaturized with highly robust characteristics, but it has only a single discharge path and requires adjustment of trigger and holding voltages to match different electronic devices
Solution Approach 1:
The ESD protection diode is segmented into multiple discharge paths by introducing additional wells (second, third, fourth, and fifth wells) with different conductivity types and potential wells. These segmented paths allow the device to handle ESD pulses from multiple directions simultaneously, transforming the single-discharge-path limitation into a multi-path protection system while maintaining the underlying SCR structure for miniaturization.
Solution Approach 2:
The ESD protection diode achieves multi-functionality by enabling protection against ESD pulses from multiple terminals through multiple discharge paths. The device can simultaneously protect against positive and negative ESD events on different pins, making a single component serve multiple protection functions that would otherwise require separate protection circuits.
2Adaptability or versatility
If the trigger voltage or holding voltage of an ESD protection diode is adjusted to match the characteristics of each electronic device, then the protection can be optimized for specific applications, but this requires additional design complexity and voltage terminal configurations
Solution Approach 1:
The ESD protection diode implements dynamic voltage adjustment by introducing adjustable voltage terminals (first, second, third, and fourth voltage terminals) that allow the trigger and holding voltages to be dynamically configured. The potential wells associated with different wells can be independently adjusted, enabling the device to adapt its electrical characteristics to match various electronic device requirements without fixed, predetermined voltage levels.
Solution Approach 2:
The device enables parameter changes by allowing independent adjustment of trigger voltage and holding voltage through the configurable potential wells and voltage terminals. This permits optimization of the ESD protection characteristics for different applications by changing the electrical parameters rather than requiring different physical device structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ESD protection diode effectively provides multiple discharge paths and increased holding voltages, enhancing the protection of electronic devices against static electricity by ensuring operation across various voltage conditions and minimizing damage from ESD pulses.
Implementation Method 1
The third P+ diffusion region, the first well, and the fourth well may form a first transistor. The first well, the fourth well, and the third well may form a second transistor. The fifth P+ diffusion region, the third well, and the fourth well may form a third transistor. The sixth P+ diffusion region, the third well, and the fifth well may form a fourth transistor. The third well, the fifth well, and the second well may form a fifth transistor. The fourth P+ diffusion region, the second well, and the fifth well may form a sixth transistor. The first transistor, the third transistor, the fourth transistor, and the sixth transistor may be PNP bipolar transistors. The second transistor and the fifth transistor may be NPN bipolar transistors.
Implementation Method 2
An internal circuit of an electronic device may be damaged by static electricity generated during a manufacturing process or during use, and a protection diode for such Electrostatic Discharge (ESD) is required.
Data Source
AI summary
Provided are an ESD protection diode and an electronic device including the same. An ESD protection diode and an electronic device including the same according to an embodiment of the inventive concept include first to fifth wells. The first well is connected to a first voltage terminal. The second well is connected to a second voltage terminal. The third well is connected to the input/output terminal. The fourth well is disposed between the first well and the third well, and the fifth well is disposed between the second well and the third well. The first to third wells are N-type wells, and the fourth and fifth wells are P-type wells. The first well includes a first N+ diffusion region and the second well includes a second N+ diffusion region. The fourth well includes a first P+ diffusion region and the fifth well includes a second P+ diffusion region. According to an embodiment of the inventive concept, an internal circuit is protected fro an ESD pulse applied to a plurality of terminals and holding voltage is increased.