ESD Protection Circuit for High-Voltage Pad Driver Outputs

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Solution Overview

Problem

Electronic devices are vulnerable to damage from electrostatic discharge (ESD), which can cause significant voltage or current fluctuations, leading to operational failures.

Innovation Solution

The implementation of an ESD protection system that includes an ESD detector, drive circuit, and protection circuits with P-type and N-type transistors connected in series, capable of generating output signals with amplitudes higher than standard supply voltages, and bias control circuits that disable transistors during ESD events to distribute voltage stress and protect the drive circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the drive circuit generates output signals with amplitudes larger than supply voltage, then signal strength is improved, but vulnerability to ESD damage increases

Engineering Contradiction:
Improveoutput signal amplitudeVSAvoidESD vulnerability
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The ESD detector continuously monitors for electrostatic discharge conditions before they can damage the drive circuit. By detecting ESD events in advance and activating protection circuits proactively, the system prepares defensive measures before the harmful discharge can cause damage, allowing the drive circuit to maintain high output amplitudes safely

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection circuit acts as an intermediary between the drive circuit and the external environment. It includes intermediate components such as clamp circuits and protection transistors that intercept and divert ESD energy away from the sensitive drive circuit, allowing the drive circuit to generate high-amplitude signals while being shielded from ESD threats

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If protection circuits disable transistors during ESD events, then ESD protection is improved, but circuit operational capability deteriorates

Engineering Contradiction:
ImproveESD protectionVSAvoidcircuit operation
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The protection circuit operates periodically rather than continuously - it monitors the operational state and only disables transistors when ESD conditions are detected. After the ESD event passes, the circuit automatically re-enables the transistors to restore full functionality. This periodic activation ensures protection during threats while maintaining normal operation during safe conditions

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The ESD detector provides continuous feedback about the electrical environment to the protection circuit. When the detector senses ESD conditions, it triggers the protection mechanism; when conditions return to normal, the feedback signal deactivates the protection mode. This feedback-based control ensures the circuit disables transistors only when necessary for protection, maintaining productivity during normal operation

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12100947B2Electrostatic discharge protection
Publication Date: 2024.09.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12100947B2 patent drawing
  • US12100947B2 patent drawing
  • US12100947B2 patent drawing

AI summary

Disclosed herein are related to a device for electrostatic discharge (ESD) protection. In one aspect, a device includes an ESD detector to detect an ESD at a pad. In one aspect, the device includes P-type transistors and N-type transistors connected in series with each other. In one aspect, the drive circuit is configured to provide an output signal to the pad. In one aspect, the device includes a first protection circuit operating in a power domain. In one aspect, in response to the ESD detected by the ESD detector, the first protection circuit is configured to disable the P-type transistors. In one aspect, the device includes a second protection circuit operating in another power domain. In one aspect, in response to the ESD detected by the ESD detector, the second protection circuit is configured to disable the N-type transistors.