ESD Protection Device With Post-Shaped Electrodes

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Solution Overview

Problem

Existing ESD protection devices for semiconductor ICs suffer from increased parasitic capacitance, which degrades high-frequency circuit characteristics due to structural design, leading to signal loss and impedance changes.

Innovation Solution

The design includes post-shaped electrodes with increased cross-sectional areas towards terminal electrodes and larger spacing between them compared to input/output electrodes, minimizing stray capacitance and reducing parasitic capacitance through optimized rewiring layer configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ESD protection device structure is used, then ESD protection function is provided, but parasitic capacitance increases and high-frequency characteristics deteriorate

Engineering Contradiction:
ImproveESD protection functionVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the electrode structure into multiple layers (first electrode layer, second electrode layer) with insulating films between them. This segmentation separates the ESD protection function from the signal transmission path, reducing parasitic capacitance while maintaining protection capability. The multi-layer configuration allows the ESD circuit to be electrically isolated from the signal line during normal operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by providing insulating films specifically in regions where electrodes overlap or are in close proximity. The insulating film is positioned locally between the first and second electrode layers to reduce capacitance only in critical areas, while maintaining good electrical connection where needed. This localized approach reduces parasitic capacitance without compromising the overall ESD protection function.

Inventive Principle:
Principle #3Local quality

2Reliability

If ESD protection device is inserted in signal line, then protection is provided, but impedance changes and signal loss occurs due to parasitic capacitance

Engineering Contradiction:
Improveprotection capabilityVSAvoidsignal loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The multi-layer electrode structure with insulating films segments the ESD protection path from the signal transmission path. This allows the signal to pass through with minimal interaction with the ESD circuit, reducing impedance changes and signal loss while maintaining protection capability when ESD events occur.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The insulating film acts as an intermediary between the first and second electrode layers. It prevents direct electrical contact and reduces capacitive coupling, thereby minimizing the impact of the ESD protection circuit on signal transmission. The intermediary layer allows the system to maintain both protection function and signal integrity simultaneously.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration results in an ESD protection device with reduced parasitic capacitance and improved high-frequency characteristics, minimizing signal loss and maintaining reliable connections while reducing thermal stress and shock sensitivity.

Implementation Method 1

A protection operation performed by the diode in the ESD protection circuit utilizes a breakdown phenomenon of the diode at the time when a reverse direction voltage is applied

Methodology Applied
Scientific EffectBreakdown phenomenon: Avalanche Breakdown

Data Source

PatentUS9202791B2ESD protection device
Publication Date: 2015.12.01 MURATA MFG CO LTD
  • US9202791B2 patent drawing
  • US9202791B2 patent drawing
  • US9202791B2 patent drawing

AI summary

An ESD protection device includes a semiconductor substrate including input/output electrodes and a rewiring layer located on the top surface of the semiconductor substrate. An ESD protection circuit is provided in the top layer of the semiconductor substrate, and the input/output electrodes are connected to the ESD protection circuit. The rewiring layer includes interlayer wiring lines, in-plane wiring lines, and post-shaped electrodes. First ends of the interlayer wiring lines provided in the thickness direction are connected to the input/output electrodes provided on the top surface of the semiconductor substrate and the second ends are connected to first ends of the in-plane wiring lines extending in the plane direction. The distance between the centers of the first and second post-shaped electrodes is larger than the distance between the centers of the first and second input/output electrodes.