ESD Protection Circuit with SCR Bypass Element
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Solution Overview
Problem
Conventional ESD protection circuits for integrated circuits, such as dual diode or MOS-based circuits and silicon controlled rectifier (SCR) circuits, suffer from leakage currents and latch-up issues during normal operation, which can lead to device damage and malfunction.
Innovation Solution
An ESD circuit with a sensing element and a bypass element, including a bipolar junction transistor or PNP transistor, that is activated during an ESD event to provide a current path between a pad and ground, preventing latch-up and allowing for quick triggering to dissipate transient high voltage discharges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection circuits (dual diode or MOS-based) are used, then ESD protection is provided, but leakage currents occur when mixed voltage signals are above Vdd or below Vss
Solution Approach 1:
The patent introduces an SCR (silicon controlled rectifier) as an intermediary component that remains inactive during normal operation and only activates during ESD events. The SCR is coupled between the I/O pad and ground, providing a low-impedance discharge path only when triggered by ESD conditions, thereby preventing leakage currents during normal voltage operation while providing effective ESD protection when needed.
2Object-generated harmful factors
If SCR ESD protection circuit is used, then leakage currents are avoided, but latch up occurs during normal IC operation rendering the IC defective
Solution Approach 1:
The patent applies local quality by making the SCR's trigger characteristics specific to ESD conditions rather than general voltage conditions. The SCR is designed with trigger thresholds and timing characteristics that respond only to the fast transient nature of ESD events, not to normal voltage variations. This localized response特性 ensures the SCR remains dormant during normal IC operation, preventing latch-up while providing protection during actual ESD events.
Solution Approach 2:
The patent utilizes the dynamic response characteristics of the SCR, which has different impedance states based on triggering conditions. During normal operation, the SCR maintains a high-impedance state that does not interfere with IC functionality. During ESD events, the rapid voltage transient dynamically triggers the SCR into a low-impedance state, providing immediate protection. This dynamic state transition prevents both leakage during normal operation and latch-up issues.
3Reliability
If conventional ESD protection is used, then ESD events are protected, but the response time is insufficient to quickly trigger protection against fast transient high voltage discharge
Solution Approach 1:
The patent implements preliminary action by pre-positioning the SCR in a ready state between the I/O pad and ground, with its trigger mechanism already configured to respond to ESD conditions. The SCR's internal structure is pre-biased such that when ESD voltage exceeds the trigger threshold, the device immediately transitions to its conducting state without requiring additional activation steps. This preliminary preparation enables sub-nanosecond response times, matching the speed of fast transient ESD discharges.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ESD circuit effectively prevents damage to internal circuits by providing a bi-directional current path during ESD events, reducing the risk of latch-up and ensuring normal operation, while maintaining low leakage currents during normal conditions.
Implementation Method 1
a sensing element coupled between the pad and ground for sensing an ESD current
Implementation Method 2
The bypass element is coupled in parallel to the sensing element between the pad and ground. The active sense output signal causes the bypass element to be activated to provide a current path between the pad and ground
Data Source
AI summary
An ESD circuit is disclosed. The ESD circuit includes a pad and a ground and a sensing element coupled between the pad and ground for sensing an ESD current. The sensing element generates an active sense output signal when an ESD current is sensed and an inactive sense output signal when no ESD current is sensed. The ESD circuit also includes a bypass element comprising a bi-polar junction transistor. The bypass element is coupled in parallel to the sensing element between the pad and ground. The active sense output signal causes the bypass element to be activated to provide a current path between the pad and ground.