ESD Protection Circuit for Semiconductor Integrated Circuits
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Solution Overview
Problem
In semiconductor integrated circuit devices with output buffer circuits having a tolerant function, existing solutions require large protective diodes to handle surge currents, increasing substrate area and cost, and fail to protect signal terminals effectively from electrostatic discharge without causing interference between multiple output buffer circuits.
Innovation Solution
A semiconductor integrated circuit device configuration that includes a high potential-side power supply terminal, a low potential-side power supply terminal, a signal terminal, an output buffer circuit with P and N channel transistors, a potential control circuit, protection diodes, a common discharge line, and an electrostatic discharge protection circuit, allowing only forward current to flow through the diodes and using a single ESD protection circuit to prevent interference between multiple output buffer circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large protective diode is used to handle surge current during breakdown, then electrostatic discharge protection is achieved, but the substrate area and manufacturing cost increase
Solution Approach 1:
The protective diode is divided into multiple smaller diodes connected in parallel. Each diode handles a portion of the surge current, collectively providing the required protection capability while reducing the total area occupied compared to a single large diode.
Solution Approach 2:
Multiple protective diodes are combined in parallel configuration to achieve the required surge current handling capability. This merging of multiple small components replaces the need for a single large component, optimizing area utilization while maintaining protection effectiveness.
2Reliability
If a protective diode is connected between the high potential-side power supply terminal and the signal terminal, then voltage higher than power supply voltage can be tolerated, but current flows from the drain into the power supply via the back gate
Solution Approach 1:
A potential control circuit is introduced as an intermediary between the signal terminal and the back gate of the P channel MOS transistor. This intermediary actively regulates the back gate potential to match the signal terminal potential, preventing current flow through the back gate while allowing the tolerant function to operate.
Solution Approach 2:
The potential control circuit proactively adjusts the back gate potential in advance before harmful current can flow. By maintaining the back gate at the same potential as the signal terminal, the circuit prevents the formation of voltage differences that would drive current through the back gate.
3Reliability
If an ESD protection circuit is provided for each input/output pad to separate back gate potentials, then electrostatic discharge protection is achieved, but the device complexity and area increase
Solution Approach 1:
A single ESD protection circuit is designed to serve multiple input/output pads simultaneously. The circuit universally handles the potential control function for all pads, eliminating the need for separate dedicated circuits for each pad and thereby reducing overall device complexity.
Solution Approach 2:
Multiple ESD protection functions are merged into a single shared circuit that can control the back gate potentials of multiple P channel MOS transistors. This consolidation reduces the total component count and simplifies the overall device architecture while maintaining protection capability across all pads.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration eliminates the need for large protective diodes, reduces substrate area and cost, and effectively protects internal circuits from electrostatic discharge without interference between multiple output buffer circuits, ensuring efficient and cost-effective ESD protection.
Implementation Method 1
a first protection diode having an anode connected to the signal terminal; a common discharge line connected to a cathode of the first protection diode; an electrostatic discharge protection circuit connected between the common discharge line and the second power supply terminal; and a second protection diode having an anode connected to the second power supply terminal, and a cathode connected to the signal terminal
Data Source
AI summary
Provided is a semiconductor integrated circuit device including: an output buffer circuit having a P channel transistor connected between a first power supply terminal and a signal terminal; a potential control circuit that supplies potential from the first power supply terminal or the signal terminal to a back gate of the P channel transistor according to the potential of the signal terminal; a first protection diode having an anode connected to the signal terminal; a common discharge line connected to a cathode of the first protection diode; an electrostatic discharge protection circuit connected between the common discharge line and a second power supply terminal; and a second protection diode having an anode connected to the second power supply terminal and a cathode connected to the signal terminal.