ESD Protection Device With Shared Pad Structure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ESD protection devices for high voltages face challenges in circuit complexity and size due to the need for separate pads for high voltage elements, which can lead to damage from electric field distribution issues.
Innovation Solution
The proposed ESD protection device incorporates a substrate with doped regions and gate electrodes to form transistors and discharge elements, allowing for separate operation of high voltage elements during normal and ESD events, thereby isolating current paths and reducing circuit complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate pads are used for high voltage elements and discharge elements, then ESD protection function is achieved, but circuit layout complexity and device size increase
Solution Approach 1:
The patent combines the high voltage element and discharge element into a shared pad structure. The first and second doped regions share a common first pad, while the third doped region uses a second pad. This merging approach reduces the number of separate pads needed while maintaining ESD protection functionality, directly addressing the contradiction between reliability and layout complexity.
Solution Approach 2:
The patent segments the discharge element into multiple doped regions (first, second, and third doped regions) with different conductive types. This segmentation allows each region to serve specific functions within the same pad structure, enabling ESD protection without requiring separate pads for each functional element, thus reducing layout complexity while maintaining protection effectiveness.
2Reliability
If separate pads are used for high voltage elements and discharge elements, then ESD protection function is achieved, but device size increases
Solution Approach 1:
The patent merges the pad structures for high voltage elements and discharge elements into a shared configuration. The first pad serves both the first doped region (high voltage element) and the second doped region (discharge element), reducing the total pad area required. This directly addresses the contradiction between maintaining ESD protection reliability and reducing device size.
3Stress or pressure
If conventional high voltage element configuration is used, then high voltage sustainment is achieved, but electric field distribution causes damage to corresponding circuit
Solution Approach 1:
The patent applies different conductive types to different doped regions locally. The first and second doped regions have a second conductive type, while the third doped region has a first conductive type. This local differentiation optimizes electric field distribution in specific areas, allowing high voltage sustainment while preventing electric field-induced damage to the circuit, resolving the contradiction between voltage sustainment and harmful electric field effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables effective ESD current release without affecting the discharge element in normal mode, sustaining high voltages while maintaining a compact circuit layout, thus enhancing the reliability of integrated circuits.
Implementation Method 1
The first doped region has a second conductive type and is formed in the substrate. The second doped region has the second conductive type and is formed in the substrate. A transistor is constituted by the first doped region, the first gate electrode, and the second doped region.
Implementation Method 2
ESD protection circuits are typically designed to be switched off during common/normal signal operation and switched on during an ESD event to release accumulated electrostatic charge.
Data Source
AI summary
An electrostatic discharge protection device including a substrate, a first doped region, a first gate electrode, a second doped region, a second gate electrode, and a third doped region is disclosed. The substrate has a first conductive type. The first doped region has a second conductive type and is formed in the substrate. The first gate electrode is formed on the substrate. The second doped region has the second conductive type and is formed in the substrate. A transistor is constituted by the first doped region, the first gate electrode, and the second doped region. The second gate electrode is formed on the substrate. The first and the second gate electrodes are separated. The third doped region has the first conductive type and is formed in the substrate. A discharge element is constituted by the first doped region, the second gate electrode, and the third doped region.