Semiconductor Device ESD Protection Circuit
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Solution Overview
Problem
Existing semiconductor devices, particularly display devices using liquid crystal and organic electroluminescent elements, are vulnerable to damage from electrostatic discharge (ESD) due to noise and internal circuit malfunctions, with known protection circuits using diodes not providing sufficient performance.
Innovation Solution
A protection circuit incorporating two transistors with gates facing each other, where a fixed potential is applied to one gate to keep the transistors off in a steady state, adding capacitance between the channel region and gate to delay and reduce the impact of ESD-induced pulse potentials, thereby suppressing ESD influence without increasing circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protection circuit using a diode including a semiconductor film is configured, then the circuit can provide basic ESD protection, but the protection performance is insufficient and the circuit area increases
Solution Approach 1:
The invention merges the protection diode function with the transistor structure by utilizing the gate region of the transistor as the diode terminal. The transistor's source, drain, and gate are configured such that the gate acts as one terminal of the protection diode while the source or drain acts as the other terminal, eliminating the need for separate diode structures and reducing overall circuit area.
Solution Approach 2:
The transistor structure performs multiple functions: it serves as both a switching element and a protection diode element. The same transistor components (source, drain, gate) are used for both normal circuit operation and ESD protection, achieving multi-functionality without requiring additional dedicated protection components.
2Use of energy by stationary object
If the transistor is kept off in steady state by applying fixed potential to one gate, then power consumption is reduced and stability is improved, but the circuit complexity increases
Solution Approach 1:
A fixed potential is applied to one gate of the transistor to maintain it at a constant electrical state, ensuring the transistor remains off during steady-state operation. This equipotential condition prevents unnecessary current flow and reduces power consumption while maintaining circuit stability.
Solution Approach 2:
The transistor's gate potential is dynamically controlled: fixed during steady state to keep the transistor off and save power, and variable during ESD events to enable protection function. This dynamic control allows the circuit to adapt between normal operation and protection modes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the impact of ESD on semiconductor devices by gradually reducing the slope of rising edge potentials, protecting internal circuitry and preventing damage to functional elements, while maintaining stable operation and low power consumption.
Implementation Method 1
capacitance can be added between a channel region and the gate to which the fixed potential is applied. When pulse potential due to ESD is applied to a wiring electrically connected to the protection circuit, the capacitance causes a delay in change of the potential of the protected wiring.
Data Source
AI summary
A protection circuit for efficiently reducing the influence of ESD and a semiconductor device in which the influence of ESD is efficiently reduced are provided. The protection circuit includes at least two protection diodes. Each protection diode is a transistor including two gates facing each other with a semiconductor layer in which a channel is formed sandwiched between the gates. A fixed potential is applied to one of the gates of the transistor.