ESD Protection Device with Vertical Electrode Stacking
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Solution Overview
Problem
Existing ESD protection devices fail to effectively suppress equivalent series inductance (ESL) in high-frequency applications, leading to increased clamp voltage and inadequate protection of semiconductor integrated circuits from surges.
Innovation Solution
The ESD protection device incorporates a zener diode and series/parallel diode configurations on a semiconductor substrate, with strategically positioned input/output electrodes and a rewiring layer to shorten current pathways, reducing ESL and maintaining low clamp voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection circuits are used in high-frequency applications, then ESD protection function is provided, but equivalent series inductance (ESL) increases causing clamp voltage to rise
Solution Approach 1:
The patent transitions from planar electrode arrangement to three-dimensional vertical stacking, where input/output electrodes are positioned at both ends of the substrate in the shorter direction, creating multiple current pathways through the thickness direction. This dimensional change reduces ESL by providing parallel current flow paths while maintaining ESD protection function.
Solution Approach 2:
The ESD protection circuit is segmented into multiple independent diode units (first diode, second diode, third diode, fourth diode) arranged in series-parallel configurations. Each diode unit forms an independent current pathway, and the segmentation allows current to distribute across multiple paths, reducing the overall equivalent series inductance while maintaining protection capability.
2Object-affected harmful factors
If current pathway length is reduced to suppress ESL, then clamp voltage decreases, but device layout becomes constrained
Solution Approach 1:
The patent employs asymmetric electrode positioning where input/output electrodes are located at both ends in the shorter direction of the substrate, creating unequal current path distributions. This asymmetric layout optimizes the current pathways to minimize inductance while accommodating the circuit complexity through strategic placement rather than symmetric arrangement.
Solution Approach 2:
By utilizing the thickness direction of the substrate to position electrodes at both ends, the patent creates three-dimensional current pathways that reduce ESL without being constrained by two-dimensional layout limitations. This dimensional approach allows complex circuit arrangements while maintaining short effective current paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses ESL, reduces clamp voltage, and enhances the ESD protection device's performance in high-frequency bands by shortening current pathways and canceling out magnetic fields, thereby improving the device's ability to protect semiconductor integrated circuits.
Implementation Method 1
a zener diode formed in a semiconductor substrate
Implementation Method 2
a first diode and a second diode aligned in the forward direction and connected in series
Implementation Method 3
the current supply efficiency depends on the ESR (equivalent series resistance), ESL (equivalent series inductance), and parasitic capacitance
Implementation Method 4
enhances the ESD protection device's performance in high-frequency bands by shortening current pathways and canceling out magnetic fields
Data Source
AI summary
An ESD protection device includes a zener diode, and a series circuit of diodes and a series circuit of diodes that are connected in parallel with the zener diode. At the connection point between the diodes, an Al electrode film is formed on the surface of a Si substrate, and at the connection point between diodes, an Al electrode film is formed on the surface of the Si substrate. The diodes are formed on the surface of the Si substrate, and the diodes are formed in the thickness direction of the Si substrate. The Si substrate has a longitudinal direction and a shorter direction orthogonal to the longitudinal direction in planar view, and the Al electrode films are formed respectively at both ends in the shorter direction of the Si substrate. Thus, provided is an ESD protection device which suppresses the ESL, and keeps the clamp voltage low.