ESD Protection SCR Device With Asymmetric Impurity Regions

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional ESD protection SCR devices have limitations in achieving high holding voltage and electrostatic discharge resistance, leading to undesired latch-up problems and operational distortion due to over-voltage and noise, especially when implemented in actual chips.

Innovation Solution

The ESD protection SCR device is designed with a p-type semiconductor substrate, epitaxial layer, and specific impurity regions and well structures to increase the base resistance and trigger voltage, including a ring-shaped n-type impurity region to surround the p-type impurity region, and a P-body region to promote N/P recombination, thereby stabilizing operation and enhancing holding voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional SCR device structure is used, then device can rapidly drain electrostatic current to ground terminal, but holding voltage is relatively low leading to undesired latch-up problems

Engineering Contradiction:
Improveelectrostatic discharge protection capabilityVSAvoidholding voltage
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies local quality by creating asymmetric impurity concentration distributions in specific regions. The first and second high concentration impurity regions are localized near the junction to increase base resistance locally, while other regions maintain lower concentrations to preserve overall device functionality and holding voltage characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the electrical parameters of the SCR device by introducing high concentration impurity regions that modify the base resistance and trigger voltage. This parameter modification allows the device to maintain high holding voltage while preserving its electrostatic discharge protection capability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If trigger voltage is reduced for better ESD protection, then device can trigger earlier to protect circuits, but holding voltage also decreases causing operational distortion

Engineering Contradiction:
Improveelectrostatic discharge immunityVSAvoidoperational stability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent uses local quality by positioning high concentration impurity regions specifically in the base area to increase base resistance locally. This localized modification affects trigger characteristics without uniformly reducing holding voltage across the entire device, thereby maintaining operational stability while improving ESD immunity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the impurity distribution into multiple regions with different concentrations. The high concentration impurity regions are separated from low concentration regions, allowing independent optimization of trigger voltage and holding voltage characteristics in different parts of the device structure.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If symmetric structure is used for simplicity, then device is easier to manufacture, but parasitic paths interact with adjacent components causing voltage distortion

Engineering Contradiction:
Improvestructural symmetryVSAvoidparasitic path interference
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent deliberately introduces asymmetry by placing high concentration impurity regions in specific asymmetric positions within the SCR structure. This asymmetric modification creates electrical isolation effects that suppress parasitic path interactions with adjacent components, resolving the interference problem while remaining compatible with standard manufacturing processes.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces the trigger voltage, increases the holding voltage, and stabilizes the operation of the ESD protection SCR device, prioritizing internal operations over parasitic paths, thus improving immunity to electrostatic discharge.

Implementation Method 1

N-type impurities are implanted into a left portion of the n-type deep well 20 to form the first well 15, whereas p-type impurities are implanted into a right portion of the n-type deep well 15 to form the second well 25

Methodology Applied
Scientific EffectImpurity doping: Dopants

Implementation Method 2

a P-body region to promote N/P recombination, thereby stabilizing operation and enhancing holding voltage

Methodology Applied
Scientific EffectCarrier recombination:

Implementation Method 3

An SCR (Silicon Controlled Rectifier) device, one typical example of the thyristor device, is composed of an anode and a cathode, and charges in the SCR device can move in a lateral direction

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Data Source

PatentUS9991369B2ESD protection SCR device
Publication Date: 2018.06.05 DONGBU HITEK CO LTD
  • US9991369B2 patent drawing
  • US9991369B2 patent drawing
  • US9991369B2 patent drawing

AI summary

An ESD protection SCR device includes a semiconductor substrate, an epitaxial layer, device isolation layers, an n-type well formed in an anode region, a first high concentration p-type impurity region formed on a surface portion of the n-type well, a first high concentration n-type impurity region formed on the surface portion of the n-type well, a p-type well formed in an cathode region, a second high concentration n-type impurity region formed on a surface portion of the p-type well, a second high concentration p-type impurity region formed on a surface portion of the p-type well so as to be spaced apart from the second high concentration n-type impurity region, and a third high-concentration p-type impurity region formed on the surface portion of the p-type well so as to surround a side portion of the second high-concentration n-type impurity region, adjacent to the anode region.