ESD Structure With Segmented Gate Regions
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Solution Overview
Problem
Existing transistor designs in ESD circuits face defects such as stress-related dislocations and lateral diffusion issues due to LOCOS processing, leading to undesirable parasitic bipolar transistor activation and reduced ESD performance.
Innovation Solution
The introduction of additional lateral opposed gate regions or oxide barrier layers to displace source and drain regions from dislocation areas, minimizing lateral diffusion and silicide formation, thereby enhancing ESD robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If LOCOS isolation is used to define active device regions, then device isolation is achieved, but stress-related dislocations occur at the bird's beak region causing lateral diffusion of source and drain regions
Solution Approach 1:
The device structure is segmented by introducing a bird's beak compensation region that separates the active device region from the LOCOS bird's beak region. This segmentation prevents the stress-related dislocations at the bird's beak from affecting the source and drain regions, thereby maintaining manufacturing precision while preserving device isolation.
Solution Approach 2:
A bird's beak compensation region is introduced as an intermediary zone between the LOCOS isolation structure and the active device region. This intermediary region absorbs the stress and prevents dislocation propagation into the active area, resolving the contradiction between maintaining isolation stability and preventing lateral diffusion.
2Area of stationary object
If source and drain regions are formed close to the LOCOS edge to minimize area, then device area is reduced, but lateral diffusion causes parasitic bipolar transistor activation
Solution Approach 1:
The device is segmented into an active region and a bird's beak compensation region. By placing the source and drain regions within the active region away from the LOCOS edge, the design maintains compact area while the segmentation prevents parasitic bipolar transistor activation that would occur with lateral diffusion into the bird's beak region.
Solution Approach 2:
The bird's beak compensation region is preliminarily designed into the device structure before source and drain formation. This preliminary action creates a protective buffer zone that prevents future lateral diffusion issues, allowing source and drain regions to be positioned optimally for both area efficiency and reliability.
3Use of energy by moving object
If metal silicides are formed on source and drain regions to reduce contact resistance, then electrical contact is improved, but silicide decoration on dislocation areas lowers threshold and causes premature turn-on
Solution Approach 1:
The device structure segments the active region from the bird's beak region using a compensation zone. This segmentation ensures that metal silicides formed on source and drain regions do not decorate dislocation areas at the bird's beak, maintaining proper threshold control while still achieving low contact resistance through silicide formation on the properly positioned source and drain regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly improves ESD protection capabilities, nearly doubling human body model ESD performance and increasing voltage handling limits without area expansion, potentially reducing the overall device area.
Implementation Method 1
These dislocations are believed to cause accelerated diffusion of impurities which form the source and drain region under bird's beak 18 and the LOCOS 16.
Implementation Method 2
The substrate 10 is subject to an oxidizing atmosphere, and local oxidation of the exposed surface of the oxide layer 12 grows to produce LOCOS region 16
Implementation Method 3
a substrate 10 has a nitride mask 14 separated from the surface of the substrate 10 by an oxide layer 12. The substrate 10 is subject to an oxidizing atmosphere
Implementation Method 4
The application of metal contact to the source and drain regions 24, 26 and/or to the gate 22 or metal gates form metal silicides.
Data Source
AI summary
An IGFET that minimizes the effect of the dislocation at the edge of the device region by displacing the lateral edges of the source and drain regions from the adjacent edge of the opening and the dislocation. This minimizes the lateral diffusion of the source and drain impurities and the formation of metal silicides into the dislocation region. The spacing of the lateral edges of the source and drain regions from the adjacent edge of the opening and the dislocation region is produced by providing additional lateral opposed second gate regions or oxide barrier layer extending from the oxide layer into the adjacent regions of the substrate region and the first gate region extending therebetween. Both the first gate region and the two second gate regions or barrier layer are used in the self-aligned processing of the source and drain regions. The first gate region defines the length of the channel, while the two opposed second gate regions or barrier layer define the width of the channel region. The second gate portion or barrier extends sufficiently into the substrate region to space the width of the channel from the adjacent edge of the opening in the oxide.