ESD Simulation Differential Voltage Calculation
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Solution Overview
Problem
Current EDA tools face inefficiencies in simulating electrostatic discharge (ESD) events, particularly in calculating effective electrical resistances and identifying driver-receiver pairs with differential voltages, which can lead to oxide damage and reliability issues in integrated circuits, especially due to the complexity and size of circuits being simulated.
Innovation Solution
A method that includes receiving design data, identifying circuits of interest, re-characterizing them for evaluating differential voltages, and determining these voltages for ESD pin locations, utilizing parallel processing to reduce complexity and leverage incremental forward solving, thereby avoiding re-factorization and improving parallelization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional ESD simulation methods are used to calculate effective electrical resistances and identify driver-receiver pairs, then simulation accuracy is maintained, but computational complexity increases significantly and simulation time becomes prohibitively long for large-scale circuits
Solution Approach 1:
The patent segments the ESD simulation process into distinct phases: identifying circuits of interest, re-characterizing them into evaluation systems, and determining differential voltages only for critical driver-receiver pairs. This segmentation avoids the need to analyze all possible pairs in the entire circuit, thereby reducing computational complexity while maintaining accuracy for the most critical cases.
Solution Approach 2:
The patent applies local quality by focusing computational resources on specific regions of the circuit - namely, identifying circuits of interest and their associated driver-receiver pairs. Instead of uniformly analyzing the entire circuit, the method concentrates effort on local areas where ESD events are most likely to occur and have the greatest impact, thus reducing overall computational burden while preserving measurement precision where it matters most.
2Reliability
If comprehensive ESD simulation is performed on all circuits to ensure reliability, then oxide damage risks are identified, but the simulation time and computational resources required become excessive
Solution Approach 1:
The patent performs preliminary actions by first identifying circuits of interest and re-characterizing them into evaluation systems before conducting the actual differential voltage calculations. This preliminary characterization filters out circuits that are less likely to experience ESD-related oxide damage, allowing the simulation to focus only on critical paths. This approach ensures reliability for the most vulnerable circuits while significantly reducing the total simulation time required.
3Measurement precision
If the circuit model is re-factorized for each driver-receiver pair evaluation, then accurate differential voltages are obtained, but the computational overhead increases significantly
Solution Approach 1:
The patent merges the evaluation of multiple driver-receiver pairs into a unified evaluation system. By re-characterizing circuits into a common framework that can evaluate multiple pairs simultaneously or in an optimized sequence, the method avoids the need to re-factorize the circuit model for each individual pair. This merging approach maintains measurement precision while dramatically improving simulation efficiency and productivity.
Data Source
AI summary
An improved approach is provided for determining differential voltages for driver and receiver pairs as a result of electrostatic discharge (ESD) events including identifying circuits of interest, re-characterizing the circuits of interest into a system for evaluating differential voltages, determining the differential voltages for ESD pin locations, and outputting results after iterating through all the ESD pin locations. In some embodiments, re-characterizing may include performing a resistance only extraction of a net, attaching a resistance to any node in the circuit and to ground, formulating a conductance matrix and distributing the total current I as source points. In some embodiments, determining differential voltages for ESD pin locations may include, stamping a first ESD pin location with a total current, solving for the system using previously computed values, mapping the driver and receiver pairs to the nodes in the system, computing the differential voltage, and recording the lowest differential voltage.