ESD Protection Thyristor Holding Voltage Footprint
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Solution Overview
Problem
Conventional area-efficient bidirectional NPN ESD protection structures suffer from lower holding voltage, making them more susceptible to latch-up conditions and requiring a larger footprint to increase current path, which is undesirable.
Innovation Solution
A low-resistance coupling is established between the upper surface region of the collector node and the anode of the thyristor structure, creating a high voltage potential that prolongs the current flow path and increases the holding voltage without enlarging the footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the current path is enlarged to increase holding voltage, then the holding voltage is improved, but the footprint of the ESD protection structure increases
Solution Approach 1:
The patent applies local quality by creating a low-resistance coupling specifically at the interface between the collector node upper surface region and the anode. This localized modification with different resistance characteristics extends the effective current path length and increases holding voltage without requiring a proportional increase in overall structure footprint.
Solution Approach 2:
The patent changes the resistance parameter locally by establishing a low-resistance coupling between the collector node and anode. This parameter change creates a high voltage potential that effectively prolongs the current flow path, thereby increasing holding voltage while maintaining a compact footprint.
2Area of stationary object
If the footprint is reduced to achieve area efficiency, then the area efficiency is improved, but the holding voltage decreases
Solution Approach 1:
The patent maintains a compact footprint while locally modifying the coupling region between the collector node and anode to have low resistance characteristics. This localized quality change creates a high voltage potential that effectively increases the holding voltage without requiring a larger overall structure.
Solution Approach 2:
By changing the resistance parameter in the specific coupling region between collector node and anode, the patent achieves area efficiency while maintaining reliability. The low-resistance coupling creates a high voltage potential that prolongs the current flow path, thereby preserving holding voltage despite the reduced footprint.
3Reliability
If a low-resistance coupling is provided between collector node and anode, then the holding voltage is increased, but the device complexity increases
Solution Approach 1:
The patent increases holding voltage by implementing a low-resistance coupling only in the specific region between the collector node upper surface region and the anode, rather than modifying the entire device structure. This localized approach minimizes the increase in device complexity while achieving the desired reliability improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the holding voltage of the ESD protection structure, achieving an area-efficient design without compromising on current capability or increasing the footprint, thus providing effective bidirectional ESD protection.
Implementation Method 1
A low-resistance coupling is provided between an upper surface region of a collector node for a thyristor structure and an anode for the thyristor structure
Data Source
AI summary
An ESD protection structure formed within a semiconductor substrate of an integrated circuit device. The ESD protection structure comprises a thyristor structure being formed from a first P-doped section forming an anode of the thyristor structure, a first N-doped section forming a collector node of the thyristor structure, a second P-doped section, and a second N-doped section forming a cathode of the thyristor structure. A low-resistance coupling is provided between an upper surface region of the collector node of the thyristor structure and the anode of the thyristor structure.