ESD Protection Thyristor with Stop Channel Regions
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Solution Overview
Problem
Existing devices for protecting electronic circuits against electrostatic discharges using lateral thyristors suffer from inefficiencies, including parasitic current flow that delays the activation of protection mechanisms, leading to increased time required to dissipate overvoltages.
Innovation Solution
A semiconductor-based device with a buried region of higher conductivity and stop channel regions surrounding wells, connected to specific terminals, and surrounded by insulating walls, which reduces the gain of lateral PNP transistors and enhances the speed of protection activation by minimizing parasitic currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lateral thyristors are used to dissipate overvoltages, then protection against electrostatic discharges is provided, but parasitic current flow delays activation of protection mechanisms
Solution Approach 1:
The patent extracts and removes the parasitic PNP transistor structures from the lateral thyristor design by implementing fully diffused structures without embedded P-type regions. This eliminates the parasitic current paths that previously delayed protection activation, allowing the thyristor to switch directly without being influenced by parasitic transistor effects.
Solution Approach 2:
The patent changes the structural parameters of the thyristor by transitioning from embedded P-type regions to fully diffused N-type structures. This parameter change modifies the current flow characteristics, eliminating parasitic PNP transistor formation and thereby reducing activation delay while maintaining protection functionality.
2Reliability
If lateral thyristors are used for protection, then overvoltages can be dissipated, but the time required to dissipate overvoltages is increased
Solution Approach 1:
The patent removes the parasitic PNP transistor structures that caused delayed activation. By implementing fully diffused N-type structures without embedded P-type regions, the parasitic current paths are eliminated, enabling faster thyristor switching and reduced time to dissipate overvoltages.
Solution Approach 2:
The patent enables the protection mechanism to skip the delay caused by parasitic transistor activation. The fully diffused structure allows the thyristor to switch directly and rapidly in response to overvoltage conditions, rushing through the protection activation process without the temporal delay previously imposed by parasitic effects.
3Reliability
If conventional lateral thyristor structures are used, then protection is provided, but parasitic currents have negative impact on performance
Solution Approach 1:
The patent extracts and eliminates the source of parasitic currents by removing embedded P-type regions from the lateral thyristor structure. The fully diffused N-type structure prevents formation of parasitic PNP transistors, thereby eliminating the harmful parasitic current flows while preserving the essential protection function.
Solution Approach 2:
The patent changes the doping structure parameters from including P-type regions to using only fully diffused N-type structures. This parameter change fundamentally alters the device physics, eliminating parasitic current generation mechanisms while maintaining the thyristor's overvoltage protection capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively decreases the time required to trigger protection mechanisms during overvoltage events, improving the efficiency of electrostatic discharge dissipation and reducing the impact of parasitic currents.
Implementation Method 1
parasitic current flow that delays the activation of protection mechanisms
Implementation Method 2
a first stop channel region of the second conductivity type having a doping level greater than that of the semiconductor layer
Data Source
AI summary
A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.