eSiGe CMOS Secondary Components Crystal Alignment
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Solution Overview
Problem
Existing methods for improving transistor performance, such as stress engineering, are not applicable to secondary active components in CMOS devices, leading to mobility and drive current degradation due to compressive stress from shallow trench isolation regions.
Innovation Solution
A method involving a direct semiconductor bonded (DSB) silicon substrate with aligned (100) oriented surfaces, where a localized amorphous silicon region is formed and recrystallized across the interface using the second layer as a template, allowing for the formation of embedded silicon germanium layers and aligned device channels in CMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stress engineering techniques are used to improve transistor performance, then carrier mobility and drive current are enhanced, but the technique cannot be applied to secondary components like input/output and long channel transistors
Solution Approach 1:
The substrate is divided into two layers with different orientations: a first layer with <100> orientation for secondary components and a second layer with <110> orientation for key active components. This segmentation allows each region to be optimized for its specific function, enabling stress engineering to be applied selectively where needed while maintaining compatibility with secondary components.
Solution Approach 2:
Different crystal orientations are assigned to different regions of the substrate. The <110> oriented region provides tensile stress for high-performance key active components, while the <100> oriented region provides a neutral stress environment suitable for secondary components. This local quality differentiation resolves the contradiction by making the structure adaptable to different component requirements.
2Ease of manufacture
If shallow trench isolation regions are used, then device fabrication is enabled, but compressive stress is generated inside active regions causing mobility and drive current degradation
Solution Approach 1:
The patent introduces tensile stress from the <110> oriented second layer to counterbalance the compressive stress generated by shallow trench isolation regions. This counterweight effect compensates for the harmful compressive stress while preserving the fabrication benefits of STI, thereby maintaining both ease of manufacture and device performance.
3Reliability
If biaxially strained silicon on relaxed silicon germanium virtual substrates is used, then carrier mobility is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent extracts the stress engineering function from the complex virtual substrate structure and implements it directly in the substrate layers themselves. By creating a bonded substrate with <110> oriented silicon layers, the tensile stress is generated intrinsically without requiring relaxed silicon germanium virtual substrates, thereby simplifying the overall device structure while maintaining mobility enhancement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances mobility and drive current for both key and secondary active components in CMOS devices by aligning crystal directions, thereby overcoming stress-related degradations and improving overall performance.
Implementation Method 1
recrystallizing the localized amorphous silicon region across the interface using the second layer as a template
Implementation Method 2
performing amorphization on a selected region of the first layer to form a localized amorphous silicon region
Data Source
AI summary
According to various embodiments, there are eSiGe CMOS devices and methods of making them. The method of making a substrate for a CMOS device can include providing a DSB silicon substrate including a first bonded to a second layer, wherein each layer has a (100) oriented surface and a first direction and a second direction and the first direction of the first layer is approximately aligned with the second direction of the second layer. The method can also include performing amorphization on a selected region of the first layer to form a localized amorphous silicon region and recrystallizing the localized amorphous silicon region across the interface using the second layer as a template, such that the first direction of the first layer in the selected region is approximately aligned with the first direction of the second layer.