ESL Driver Circuit Aggregating Busy Signals to Reduce Polling Time
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ESL driver circuits require a significant time period to update display pictures and need to query each driver to determine if they are busy or idle, limiting their performance due to the need for sequential polling.
Innovation Solution
An ESL driver circuit architecture that aggregates busy signals from multiple ESL drivers using controlling transistors and a serial transmission protocol, allowing the host circuit to determine if all drivers are idle without querying each one individually, thereby reducing the time wasted on polling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the host circuit queries each ESL driver individually to determine busy or idle state, then the system can accurately track driver status, but the time consumption increases significantly due to sequential polling
Solution Approach 1:
The patent combines multiple ESL drivers into a single driver group controlled by one host circuit. The busy port of each ESL driver is connected to the control circuit through individual control transistors, and all control transistors share a common drain terminal connected to the host circuit's busy port. This merging allows the host circuit to determine the busy/idle state of all drivers simultaneously through a single status check, eliminating sequential polling while maintaining accurate status detection.
2Adaptability or versatility
If multiple ESL drivers operate with different oscillation frequencies and frame rates, then each driver can be optimized for its specific ESL panel, but the host circuit cannot efficiently manage all drivers due to varying update times
Solution Approach 1:
The patent segments the control of multiple ESL drivers by providing individual control ports and control transistors for each driver within the driver group. This allows the host circuit to independently control and manage each driver's operation parameters (such as oscillation frequency and frame rate) while still benefiting from the aggregated status monitoring. The segmentation enables flexible configuration of each driver according to its specific ESL panel requirements without compromising overall system efficiency.
3Ease of operation
If the host circuit controls multiple ESL drivers individually, then each driver can be managed separately, but the system complexity increases due to multiple control lines and query commands
Solution Approach 1:
The patent implements a universal control architecture where a single host circuit can control multiple ESL drivers through standardized control ports and a unified busy port interface. The control circuit uses identical control transistor configurations for each driver, and all drivers share the same communication protocol and status monitoring mechanism. This multi-functionality allows the host circuit to manage multiple drivers with varying parameters while maintaining a relatively simple and standardized control architecture, reducing overall system complexity compared to fully individualized control.
Data Source
AI summary
An ESL driver circuit to be coupled to a host circuit and an ESL panel includes an ESL driver and a controlling transistor. The ESL driver has a serial clock input coupled to the serial clock port of the ESL driver circuit, a serial data input coupled to the serial data port of the ESL driver circuit, a control input coupled to the control port of the ESL driver circuit, and a busy output. The controlling transistor has a control terminal coupled to the busy output of the ESL driver, a first terminal coupled to a supply voltage level via a resistor, and a second terminal coupled to a ground level, and is configured to receive the busy output of the ESL driver to generate a busy signal at the first terminal.