eSPI Bus System with Alert Handshake Unlocking

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Solution Overview

Problem

Conventional bus systems, particularly those using enhanced serial peripheral interface (eSPI) bus architectures, are limited to one-to-one communication mechanisms, which restrict the ability to efficiently schedule and communicate with multiple slave devices, hindering expandability and flexibility.

Innovation Solution

A bus system that incorporates a master device connected via an eSPI bus to multiple slave devices, utilizing alert handshake pins and control lines to enable one-to-many communication, with a primary slave device verifying program codes and unlocking other slave devices for secure communication with the master device through an SPI bus.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If one-to-one communication mechanism is used in eSPI bus architecture, then communication security is improved, but communication efficiency and expandability deteriorate

Engineering Contradiction:
Improvecommunication securityVSAvoidcommunication efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system segments the communication process into distinct phases: verification phase (one-to-one secure communication for program code verification) and operation phase (one-to-many communication for data transmission). This segmentation allows the system to maintain security during verification while achieving efficiency during operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary verification of program codes through secure one-to-one communication before enabling one-to-many communication. The master device verifies program codes from the first slave device, and only after successful verification are additional slave devices unlocked and enabled for communication, ensuring security is established before efficiency is optimized.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If one-to-one communication mechanism is used in eSPI bus architecture, then communication security is improved, but system expandability deteriorates

Engineering Contradiction:
Improvecommunication securityVSAvoidsystem expandability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system dynamically adjusts the communication mode and the number of active slave devices based on verification results. Initially, only the first slave device is unlocked for secure verification. After successful verification, the system dynamically unlocks additional slave devices, transitioning from a static one-to-one configuration to a dynamic one-to-many configuration, thereby improving expandability while maintaining security.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The first slave device acts as an intermediary that mediates between the master device and additional slave devices. It receives and verifies program codes from the master device, then unlocks additional slave devices after successful verification. This intermediary role enables secure expansion of the system without requiring the master device to directly manage security for each slave device.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If multiple slave devices are connected via eSPI bus, then system functionality is improved, but communication control complexity increases

Engineering Contradiction:
Improvesystem functionalityVSAvoidcommunication control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system merges the verification function and the unlock function into a single integrated process. The master device combines program code verification with the unlocking of additional slave devices, so that one verification operation simultaneously enables multiple slave devices. This merging reduces the number of separate control operations needed, thereby reducing communication control complexity while maintaining enhanced system functionality.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11630787B2Bus system
Publication Date: 2023.04.18 NUVOTON
  • US11630787B2 patent drawing
  • US11630787B2 patent drawing
  • US11630787B2 patent drawing

AI summary

A bus system is provided. A memory device is electrically connected to a master device via a serial peripheral interface (SPI) bus. A plurality of slave devices are electrically connected to the master device via an enhanced SPI (eSPI) bus. Each of the slave devices has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert-handshake control line. The first slave device is electrically connected to the memory device via the SPI bus. After obtaining a program code from the memory device, the first slave device verifies the program code using a security code and controls the alert-handshake control line to unlock all the slave devices except for the first slave device via the alert handshake pin in response to the program code being verified. The unlocked slave devices communicate with the master device via the eSPI bus.