eSPI Virtual Wire Crash Notification

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Solution Overview

Problem

In computing systems, catastrophic error notifications are challenging to transmit efficiently between devices without requiring additional pins and voltage level translators, especially from the CPU to secondary devices like embedded controllers, which complicates crash log data retrieval before CPU reset.

Innovation Solution

The Enhanced Serial Peripheral Interface (eSPI) method uses packet-based signaling, specifically virtual wires over an eSPI data bus, to notify secondary devices of crash events, allowing for crash log data retrieval and system reset without dedicated wire signals, thus eliminating the need for extra pin allocation and voltage translators.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated wire signals are used for crash event notification from CPU to secondary devices, then notification reliability is improved, but device complexity and pin allocation requirements worsen

Engineering Contradiction:
Improvecrash event notification reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The eSPI interface is designed to serve multiple functions: it handles both normal operational communication between the CPU and secondary devices, and crash event notification. By making the notification mechanism universal (using the existing eSPI data bus for both purposes), the patent eliminates the need for dedicated notification wires while maintaining reliable crash event signaling.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the crash event notification function with the existing eSPI communication infrastructure. Instead of separating notification into a dedicated physical channel, it combines notification packets with the regular eSPI data bus traffic, thereby reducing pin allocation requirements and device complexity while maintaining notification reliability.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If dedicated wire signals are used for crash event notification, then notification speed is improved, but pin allocation and voltage level translators worsen

Engineering Contradiction:
Improvenotification speedVSAvoidpin allocation
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The eSPI data bus is designed to handle both regular communication and crash event notifications at high speeds. By making the notification mechanism universal and using the existing high-speed eSPI infrastructure, the patent achieves fast notification without requiring additional dedicated high-speed notification pins.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If packet-based signaling is used over eSPI data bus, then pin allocation is reduced, but notification reliability may worsen

Engineering Contradiction:
Improvepin allocationVSAvoidnotification reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent implements preliminary action by defining specific packet types and protocols in advance for crash event notification. The eSPI specification pre-defines how notification packets are structured, transmitted, and recognized, ensuring reliable delivery without requiring additional hardware. The secondary device is pre-configured to recognize and respond to these specific packet types.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The eSPI packet-based notification system incorporates feedback mechanisms where the secondary device acknowledges receipt of crash event notifications. This feedback ensures reliable delivery of notifications while using only the existing data bus, maintaining reliability without dedicated notification wires.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11163659B2Enhanced serial peripheral interface (eSPI) signaling for crash event notification
Publication Date: 2021.11.02 INTEL CORP
  • US11163659B2 patent drawing
  • US11163659B2 patent drawing
  • US11163659B2 patent drawing

AI summary

Embodiments may include apparatus, systems, and methods associated with an Enhanced Serial Peripheral Interface (eSPI) channel interface to couple to a data bus to link an eSPI primary device to an eSPI secondary device. In embodiments, the eSPI primary device includes an eSPI device controller and is coupled to the channel interface and transmits a notification of a crash event, e.g., a catastrophic error (CATERR), via packet-based signaling, such as a virtual wire (VW) over the data bus to allow the eSPI primary device to transmit the notification of the crash event without allocation of a dedicated wire signal for the notification between the eSPI primary device and the eSPI secondary device. Other embodiments may be described and/or claimed.