Etch Block Structure for Deep Trench Isolation Over-Etch Control
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Solution Overview
Problem
The formation of back-side isolation structures in CMOS image sensors can lead to over-etching, causing damage to the substrate and resulting in defects such as increased dark current, white pixels, and reduced full well capacity due to the impingement of shallow trench isolation structures on active areas and etch loading at cross-roads between isolation structure segments.
Innovation Solution
An etch block structure is arranged on the front-side of the substrate between neighboring gate structures, with a contact etch stop layer on top, which terminates the back-side isolation structure, preventing over-etching and substrate damage by stopping the etching process and allowing for better electrical isolation between pixel regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If back-side isolation structures are formed to provide electrical isolation between pixel regions, then electrical isolation is improved, but over-etching occurs causing substrate damage and defects
Solution Approach 1:
An etch block structure is formed on the front side of the substrate before forming the back-side isolation structure. This preliminary structure serves as a depth stop during the etching process from the back side, preventing over-etching and substrate damage while allowing the isolation structure to reach the required depth for electrical isolation.
Solution Approach 2:
The etch block structure acts as an intermediary element between the etching process and the substrate. It provides a controlled termination point for the etch, mediating the interaction between the isotropic etchant and the substrate to prevent harmful over-etching while maintaining effective electrical isolation.
2Reliability
If etching is extended to improve isolation between pixel regions, then electrical isolation is improved, but dark current increases due to substrate damage
Solution Approach 1:
The etch block structure is formed in advance on the front side to define the maximum etch depth. This preliminary action ensures that when etching from the back side, the isolation structure achieves sufficient depth for electrical isolation without penetrating through the substrate, thereby preventing dark current generation from substrate damage.
3Reliability
If isolation structure depth is increased to improve electrical isolation, then isolation performance is improved, but full well capacity is reduced due to substrate impingement
Solution Approach 1:
The etch block structure is formed beforehand to establish a precise depth limit for the isolation etching. This allows the isolation structure to be extended to the optimal depth for electrical isolation without impinging on the active substrate regions, thereby maintaining full well capacity while achieving improved isolation performance.
Data Source
AI summary
The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions. An etch block structure is arranged on the first side of the substrate between neighboring ones of the plurality of gate structures. A contact etch stop layer (CESL) is arranged on the etch block structure between the neighboring ones of the plurality of gate structures. An isolation structure is disposed between one or more sidewalls of the substrate and extends from a second side of the substrate to the first side of the substrate. The etch block structure is vertically between the isolation structure and the CESL.