Etch-Resistant Layer for Self-Aligned Contact Isolation
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Solution Overview
Problem
As integrated circuits shrink, the reduced space between self-aligned contact (SAC) structures and gate structures increases the likelihood of short circuits and leakage current due to incomplete sidewall spacers being consumed during the formation process.
Innovation Solution
A method involving the formation of an etch-resistant layer on the sidewalls and bottom of contact openings, which is densified thermally to provide effective electrical isolation and compensate for the damaged spacer liner, preventing leakage current between the gate and self-aligned contact structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the space between self-aligned contact structures and gate structures is reduced to accommodate integrated circuit shrinkage, then device integration density is improved, but the risk of short circuits and leakage current increases
Solution Approach 1:
An etch-resistant layer is introduced as an intermediary component between the gate structure and the self-aligned contact structure. This layer acts as a protective mediator that prevents direct contact and potential short circuits while allowing the structures to be positioned closer together, thus enabling higher integration density without compromising reliability.
Solution Approach 2:
The etch-resistant layer is formed in advance before the contact hole etching process. This preliminary action ensures that the protective layer is already in place to prevent leakage current and short circuits during subsequent processing steps, addressing the reliability concern before the structures are fully formed and tested.
2Ease of manufacture
If sidewall spacers are consumed during self-aligned contact formation, then contact alignment is simplified, but electrical isolation between gate and contact structures deteriorates
Solution Approach 1:
The etch-resistant layer serves as a permanent intermediary barrier that replaces the temporary protective function of sidewall spacers. While sidewall spacers are consumed during the process to enable alignment, the etch-resistant layer remains to provide continuous electrical isolation, thus maintaining both ease of manufacture and reliability.
Solution Approach 2:
The invention changes the material parameter of the isolation layer from consumable sidewall spacer material to etch-resistant material. This parameter change ensures that the isolation function is maintained throughout the entire manufacturing process and in the final device, preventing leakage current while preserving the alignment benefits of sidewall spacer consumption.
3Productivity
If spacer liner is damaged during sacrificial layer removal, then contact opening formation is achieved, but electrical isolation between gate and contact structures is compromised
Solution Approach 1:
The etch-resistant layer is formed beforehand to cushion and protect against the damage that occurs during sacrificial layer removal. This prior cushioning ensures that even if the spacer liner is damaged during the aggressive etching process needed for productivity, the electrical isolation function is preserved by the robust etch-resistant layer.
Solution Approach 2:
The invention accepts that the spacer liner may be consumed or damaged during the sacrificial layer removal process, treating it as a disposable protective layer. The permanent etch-resistant layer then takes over the electrical isolation function, allowing the process to proceed efficiently without compromising final device reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The etch-resistant layer effectively prevents short circuits and leakage current by maintaining the necessary distance between the gate and self-aligned contact structures, enhancing the reliability and quality of the semiconductor device.
Implementation Method 1
the etch resistant layer is densified by a thermal process
Data Source
AI summary
A method for forming a self-aligned contact includes providing a substrate with a plurality of gate structures formed on the substrate. The method also includes forming a spacer liner on the gate structures and the substrate. The method also includes forming a sacrificial layer between the gate structures and on the gate structures. The method also includes forming a plurality of dielectric plugs through the sacrificial layer above the gate structures. The method also includes removing the sacrificial layer to form a plurality of contact openings between the gate structures. The method also includes forming an etch resistant layer conformally covering the sidewall and the bottom of the contact openings. The method also includes forming a plurality of contact plugs in the contact openings.


