Etch-Resistant Semiconductor Plug for 3D Memory

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Solution Overview

Problem

In 3D memory devices, excessive material loss during the etching process of semiconductor plugs leads to short circuits and reliability issues, as the etching solution often removes excess material, leaving residues that affect subsequent fabrication steps and device performance.

Innovation Solution

An etch-resistant layer is formed at the top portion of the semiconductor plug by doping it with materials like carbon, which significantly reduces material loss by preventing the etching solution from penetrating and etching through, thereby maintaining the integrity of the plug during the etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the etching process is performed to remove excess semiconductor material, then the material loss is reduced, but the etching solution penetrates and etches through the plug causing short circuits

Engineering Contradiction:
Improveplug integrityVSAvoidshort circuit prevention
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

An etch-resistant layer is formed at the top portion of the semiconductor plug before the etching process. This preliminary protective layer prevents the etching solution from penetrating and etching through the plug, thereby resolving the contradiction between removing excess material and preventing short circuits.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The etch-resistant layer acts as an intermediary between the semiconductor plug and the etching solution. It allows the etching process to remove excess material while protecting the plug from being etched through, thus preventing short circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of substance

If the etching process removes excess material, then material loss is reduced, but residues remain affecting subsequent fabrication steps

Engineering Contradiction:
Improvematerial lossVSAvoidfabrication quality
Core Design Contradiction:
Loss of substanceVSManufacturing precision

Solution Approach 1:

The etch-resistant layer is formed in advance to control the etching process more precisely. It allows for better material removal without leaving harmful residues, improving fabrication quality.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

By introducing the etch-resistant layer, the etching parameters are effectively changed. The layer modifies the etching rate and selectivity, enabling precise material removal while preventing residue formation that would affect subsequent steps.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The etch-resistant layer effectively minimizes material loss, enhances the yield and reliability of 3D memory devices, and allows for the use of higher carrier mobility materials like silicon-germanium, improving device performance.

Implementation Method 1

The semiconductor plug is in contact with the substrate and includes a top portion doped with an etch-resistant material.

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS11094703B1Semiconductor plug having an etch-resistant layer in three-dimensional memory devices
Publication Date: 2021.08.17 YANGTZE MEMORY TECH CO LTD
  • US11094703B1 patent drawing
  • US11094703B1 patent drawing
  • US11094703B1 patent drawing

AI summary

3D memory devices with an etch-resistant layer and methods for forming the same are disclosed. A memory device includes a substrate and a memory stack disposed on the substrate. The memory stack includes a plurality of interleaved conductor layers and dielectric layers. The memory device also includes a plurality of memory strings each extending vertically through the memory stack and including a semiconductor plug at a bottom portion of the memory string. The semiconductor plug is in contact with the substrate and includes a top portion doped with an etch-resistant material.