Etch Stop Layer for Self-Aligned Source/Drain Contacts
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for achieving self-aligned source/drain contacts in semiconductor devices with metal gate stacks face challenges due to the difficulty in achieving uniform etch-back of multi-material gate stacks, leading to a risk of shorting between source/drain contacts and gate stacks, especially at small contacted gate pitches.
Innovation Solution
The integration of an etch stop layer into the gate stack, formed using a sacrificial material with a higher Ge concentration, allows for controlled recessing and creation of an insulating gate cap, enabling precise etching of source/drain contact vias without shorting to the gate structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If timed etch-back of filled metal gate stack is used to achieve self-aligned source/drain contact, then source/drain contact alignment is improved, but manufacturing precision deteriorates due to non-uniform etch-back of multi-material gate stack
Solution Approach 1:
The gate stack is segmented into multiple material layers (first gate dielectric layer, first gate conductor layer, second gate conductor layer, third gate conductor layer) with distinct etch selectivities. This segmentation allows selective removal of specific layers through targeted etching processes, achieving uniform and controlled etch-back without affecting other layers, thereby resolving the non-uniform etch-back problem while maintaining alignment precision
Solution Approach 2:
An intermediate etch stop layer is introduced between the gate conductor layers and the sacrificial material layer. This intermediary layer serves as a controlled etching boundary that prevents over-etching into the gate structures while allowing complete removal of sacrificial material, thus enabling precise control of etch-back depth and avoiding shorting between source/drain contacts and gate stacks
2Reliability
If multi-material gate stack is used to achieve desired gate functionality, then device performance is improved, but etch-back uniformity deteriorates making controlled recessing difficult
Solution Approach 1:
Different material layers within the gate stack are assigned different local qualities (etch selectivities). The first gate dielectric layer has different etch resistance compared to the gate conductor layers, which in turn have different selectivities from the sacrificial material layer. This local quality differentiation enables selective etching of specific regions while preserving others, achieving both functional performance and etching control
Solution Approach 2:
The gate stack employs a composite structure with multiple conductor materials (different gate conductor layers) and dielectric materials stacked together. Each material is selected for its specific etch selectivity characteristics, creating a composite structure that can be selectively etched layer-by-layer. This composite approach maintains the functional benefits of multi-material gates while enabling precise etch-back control through selective removal of sacrificial layers
3Reliability
If gate stack recessing is performed to create insulating gate cap, then contact isolation is improved, but risk of shorting increases due to difficult etch-back control
Solution Approach 1:
Sacrificial material layers are预先 deposited between the gate stack and the source/drain contact regions before the gate stack is fully formed. These sacrificial layers are then selectively removed through controlled etching, creating voids that are subsequently filled with dielectric material to form the insulating gate cap. This preliminary action ensures proper contact isolation while the controlled etching process prevents shorting by stopping at the etch stop layer
Solution Approach 2:
The etch stop layer acts as an intermediary boundary during the recessing process. It allows the etching process to proceed through the sacrificial material layer completely while preventing further etching into the gate conductor layers. This intermediary layer thus enables the creation of the insulating gate cap structure without risking damage to or shorting of the gate structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures accurate and reliable formation of self-aligned source/drain contacts by preventing shorting, improving the manufacturing process efficiency and reducing errors at small gate pitches.
Implementation Method 1
epitaxially growing source/drain regions from the channel material layers
Implementation Method 2
one of the plurality of sacrificial material layers is a top layer of the stacked configuration... removing remaining portions of the plurality of sacrificial material layers
Data Source
AI summary
A semiconductor device includes a plurality of gate stacks spaced apart from each other on a substrate, an etch stop layer formed on an upper surface of each gate stack, a dielectric cap layer formed on each etch stop layer, a plurality of source/drain regions formed on the substrate between respective pairs of adjacent gate stacks, and a plurality of contacts respectively corresponding to each source/drain region, wherein the contacts are separated from the gate structures and contact their corresponding source/drain regions.