Etch Stop Layer Stress Control in Semiconductor Devices
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Solution Overview
Problem
Existing semiconductor devices face challenges in forming an etch stop layer with uniform thickness and desired stress properties, which affects the performance of MOS transistors in highly integrated semiconductor devices.
Innovation Solution
A semiconductor device is fabricated with an etch stop layer and auxiliary spacer formed from tensile silicon nitride, using a plasma enhanced chemical vapor deposition (PECVD) method, where the total thickness of the auxiliary spacer and etch stop layer on the sidewall is equal to or greater than the etch stop layer on the upper surface, enhancing transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a silicon nitride layer is formed as an etch stop layer, then the current driving capability of NMOS transistor is improved, but it is difficult to form the etch stop layer with both uniform thickness and desired stress property
Solution Approach 1:
The patent divides the etch stop layer formation into two separate layers: a first etch stop layer formed conformally over the substrate, and a second etch stop layer formed only in contact hole regions. This segmentation allows each layer to be optimized independently - the first layer provides uniform thickness and stress control, while the second layer provides the desired stress property in critical areas, thereby resolving the contradiction between thickness uniformity and stress property control.
Solution Approach 2:
The patent applies different stress properties to different locations by forming the second etch stop layer selectively in contact hole regions with tensile stress, while the first etch stop layer provides compressive stress elsewhere. This local differentiation allows the etch stop layer to have uniform thickness overall while providing desired stress properties in specific critical regions, resolving the contradiction between uniformity and localized stress control.
2Reliability
If the etch stop layer is formed with desired stress property, then transistor characteristics are improved, but control of the thickness becomes difficult
Solution Approach 1:
By segmenting the etch stop layer into a first layer formed conformally with controlled thickness and a second layer formed selectively in contact holes with specific stress properties, the patent enables independent control of thickness and stress properties. The first layer ensures uniform thickness control, while the second layer provides the desired stress property, thereby resolving the contradiction between thickness control and stress property achievement.
Solution Approach 2:
The patent changes the stress parameter by forming two layers with different stress properties - the first etch stop layer with compressive stress and the second etch stop layer with tensile stress. This parameter differentiation allows precise control of both thickness (through the conformal first layer) and stress properties (through the selectively formed second layer), resolving the contradiction between thickness control and stress property optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for improved transistor performance by controlling the thickness of the etch stop layer and achieving the desired stress properties, thereby increasing the current driving capability of NMOS transistors and maintaining uniformity across the device.
Implementation Method 1
using a plasma enhanced chemical vapor deposition (PECVD) method
Data Source
AI summary
A semiconductor device having an etch stop layer and a method of fabricating the same are provided. The semiconductor device may include a substrate and a first gate electrode formed on the substrate. An auxiliary spacer may be formed on the sidewall of the first gate electrode. An etch stop layer may be formed on the substrate having the auxiliary spacer. The etch stop layer and the auxiliary spacer may be formed of a material having a same stress property.