Semiconductor Etch Stop Structure for Pit-Free Metal Interconnects

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Solution Overview

Problem

The semiconductor industry faces challenges in forming reliable metal wiring layers due to the complexity and miniaturization of integrated circuits, where existing etch stop layers struggle to prevent under-etching and over-etching, leading to issues like pit formation and increased leakage current.

Innovation Solution

A new etch stop layer is introduced, comprising a metal-containing layer with nitride-containing regions contacting conductive features and an oxide-containing region contacting the dielectric layer, which enhances bonding strength and reduces pit formation, while the silicon-containing layer acts as a barrier to prevent metal diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional etch stop layer is used in metal wiring fabrication, then the etching process can be controlled, but under-etching and over-etching occur leading to pit formation and increased leakage current

Engineering Contradiction:
Improveetching controlVSAvoidleakage current
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The etch stop layer is segmented into multiple distinct layers: a first etch stop layer comprising silicon nitride and a second etch stop layer comprising silicon oxide. This segmentation allows each layer to perform its etching stop function independently with different etching rates, preventing both under-etching and over-etching while eliminating pit formation and reducing leakage current.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The etch stop structure uses composite materials with different chemical compositions and etching characteristics. The silicon nitride layer and silicon oxide layer form a composite etch stop system where each material provides specific etching resistance properties, enabling precise control over the etching process and improving overall device reliability.

Inventive Principle:
Principle #40Composite materials

2Productivity

If the density of elements is increased to achieve higher IC performance, then functionality is improved, but the dimensions and spacing between components are reduced making fabrication more difficult

Engineering Contradiction:
ImproveIC performanceVSAvoidcomponent spacing
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The multi-layer etch stop structure segments the etching control function across different layers with distinct thicknesses and material properties. This segmentation enables precise control of etching depth even as component dimensions are reduced, allowing higher element density while maintaining manufacturing precision in modern IC fabrication processes.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces pit formation in conductive features by at least 95% and improves time-dependent dielectric breakdown and breakdown voltage characteristics, enhancing the performance, yield, and reliability of semiconductor structures.

Implementation Method 1

nitride-containing regions contacting conductive features... enhances bonding strength

Methodology Applied
Scientific EffectChemical bonding: Chemical Bonding

Implementation Method 2

oxide-containing region contacting the dielectric layer

Methodology Applied
Scientific EffectChemical bonding: Chemical Bonding

Implementation Method 3

silicon-containing layer acts as a barrier to prevent metal diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20240387252A1Semiconductor structure and manufacturing method thereof
Publication Date: 2024.11.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240387252A1 patent drawing
  • US20240387252A1 patent drawing
  • US20240387252A1 patent drawing

AI summary

A semiconductor structure including a substrate, a first dielectric layer, a first conductive feature, an etch stop layer, a second dielectric layer and a second conductive feature is provided. The first dielectric layer is disposed over the substrate. The first conductive feature is disposed in the first dielectric layer. The etch stop layer is disposed over the first dielectric layer and the first conductive feature, wherein the etch stop layer comprises a metal-containing layer and a silicon-containing layer, the metal-containing layer is located between the first dielectric layer and the silicon-containing layer, the metal-containing layer comprises a nitride-containing region and an oxide-containing region, and the nitride-containing region contacts the first conductive feature. The second dielectric layer is disposed over the etch stop layer. The second conductive feature penetrates the second dielectric layer and electrically connects with the first conductive feature.