Etched Conductive Posts for Semiconductor Package Space

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Solution Overview

Problem

Conventional semiconductor package manufacturing methods face challenges in miniaturization and high-performance requirements, as they struggle to efficiently integrate and stack passive and active elements on limited substrates while maintaining cost-effectiveness and reducing process time.

Innovation Solution

The method involves forming conductive posts on a temporary metal plate through etching, connecting them to a remaining planar portion, filling between the posts, removing the planar portion, and then forming conductive patterns and dielectric layers to secure space for semiconductor devices, thereby reducing manufacturing costs and time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional electroplating or electroless plating methods are used to form conductive posts, then the posts can be manufactured with good electrical conductivity, but the manufacturing cost and process time increase

Engineering Contradiction:
Improveelectrical conductivityVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the conductive posts from the substrate and forms them as separate components on a temporary carrier substrate. This allows the posts to be pre-formed with precise dimensions and electrical properties, then transferred to the final substrate, thereby reducing overall manufacturing time and cost while maintaining conductivity requirements

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The conductive posts are formed in advance on a temporary carrier substrate before being transferred to the final substrate. This preliminary formation allows for optimized manufacturing processes and better control over post dimensions and electrical properties, improving both productivity and reliability

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If many passive and active elements are integrated on a limited substrate to achieve high capacity, then the package capacity increases, but the substrate space for mounting semiconductor devices decreases

Engineering Contradiction:
Improvepackage capacityVSAvoidmounting space
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent utilizes the vertical dimension by forming conductive posts that extend upward from the substrate surface. This allows electrical connections to be made through the vertical space rather than requiring additional horizontal substrate area, thereby increasing package capacity without sacrificing mounting space for semiconductor devices

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductive posts are formed within the substrate structure, with the posts nested inside the substrate volume. This nested configuration allows the posts to occupy internal space rather than surface area, enabling high integration of passive and active elements while preserving valuable mounting space on the substrate surface

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for efficient space allocation for semiconductor devices, reduces manufacturing costs, and shortens the process time compared to traditional methods like electroplating or electroless plating, while maintaining high integration and performance.

Implementation Method 1

forming conductive posts by etching a metal plate

Methodology Applied
Scientific EffectEtching: Ablation

Data Source

PatentUS10020263B2Semiconductor package and manufacturing method thereof
Publication Date: 2018.07.10 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US10020263B2 patent drawing
  • US10020263B2 patent drawing
  • US10020263B2 patent drawing

AI summary

Provided are a semiconductor package and a manufacturing method thereof for securing a space for mounting a semiconductor device by etching a temporary metal plate to form a plurality of conductive posts.