Etched Flip-Chip Connectors With Concave Posts
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Solution Overview
Problem
Conventional microelectronic packaging technologies face challenges in minimizing package thickness while enhancing joint reliability, particularly in forming microcontacts with high aspect ratios and small pitch or spacing, which limits the configuration and reliability of flip-chip interconnections.
Innovation Solution
The development of packaged microelectronic elements featuring solid metal posts with concave circumferential surfaces and fusible metal connections, such as solder, that allow for increased standoff height and reduced pitch between conductive posts, enabling improved mechanical and electrical attachment to substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to form microcontacts, then the manufacturing process is simple, but the aspect ratio and pitch of microcontacts are limited
Solution Approach 1:
The patent divides the microcontact formation process into multiple etching stages, where each stage creates a portion of the final microcontact structure. This segmentation allows achieving high aspect ratios that cannot be obtained through conventional single-step etching processes.
Solution Approach 2:
The patent performs preliminary etching actions to create intermediate structures that serve as foundations for subsequent etching steps. These preliminary actions enable the formation of microcontacts with high aspect ratios by preparing the structure in advance for further vertical etching.
2Reliability
If the vertical distance between microelectronic element and substrate is increased, then joint reliability is enhanced, but package thickness increases
Solution Approach 1:
The patent transitions from horizontal spacing to vertical spacing by forming high aspect ratio microcontacts that extend vertically from the microelectronic element to the substrate. This dimensional change allows increasing the vertical distance for improved joint reliability while maintaining a compact horizontal footprint, thereby reducing overall package thickness.
Solution Approach 2:
The patent changes the geometric parameters of the microcontacts by forming structures with high aspect ratios (vertical dimension much greater than horizontal dimension). This parameter change enables the microcontacts to provide sufficient mechanical strength and electrical conductivity over increased vertical distances without proportionally increasing package thickness.
3Quantity of substance
If the pitch between conductive posts is reduced, then device density is increased, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the etching process into multiple controlled stages, each creating portions of the microcontact array. This segmentation allows precise control over the pitch and spacing of individual microcontacts, enabling reduced pitch while maintaining manufacturing precision through step-by-step formation rather than attempting to create all microcontacts in a single process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances joint reliability and reduces stress on Low-k dielectric materials, allowing for a greater variety of underfills and improved durability by increasing the vertical distance between the microelectronic element and substrate while maintaining a reduced horizontal distance between conductive columns.
Implementation Method 1
The fusible metal can comprise solder. The solder can cover at least portions of edge surfaces of each solid metal post.
Implementation Method 2
The conductive elements can be joined to the solid metal posts with a fusible metal. The fusible metal can comprise solder.
Data Source
AI summary
A packaged microelectronic element includes a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface. A substrate has a major surface and a plurality of conductive elements exposed at the major surface and joined to the first solid metal posts. In particular examples, the conductive elements can be bond pads or can be second posts having top surfaces and edge surfaces extending at substantial angles away therefrom. Each first solid metal post includes a base region adjacent the microelectronic element and a tip region remote from the microelectronic element, the base region and tip region having respective concave circumferential surfaces. Each first solid metal post has a horizontal dimension which is a first function of vertical location in the base region and which is a second function of vertical location in the tip region.