Etched Foil Capacitor Integrated into Leadframe

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Solution Overview

Problem

Traditional semiconductor package fabrication methods limit the integration of multiple capacitors within small leadframe-based packages, resulting in increased parasitic resistances and costs due to the placement of capacitors as piece parts on the board rather than within the package.

Innovation Solution

A process flow that reverses the conventional method by first forming and patterning foil capacitors, then patterning the leadframe, allowing for the integration of an arbitrary number of capacitors directly within the package by etching pores in aluminum foil, oxidizing the surfaces, filling with conductive polymeric compound, and depositing metal, while maintaining the standard steps of attaching a chip, wire bonding, overmolding, and singulating the device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If capacitors are placed as piece parts on the board in tight proximity to semiconductor devices, then board space is conserved and parasitic resistances are minimized, but manufacturing complexity increases and integration density is limited

Engineering Contradiction:
Improveintegration density of capacitorsVSAvoidmanufacturing process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges the capacitor manufacturing process with the leadframe manufacturing process by integrating capacitor formation steps into the existing leadframe fabrication flow. This allows capacitors to be formed directly on the leadframe substrate during the same manufacturing cycle, eliminating separate capacitor assembly steps and enabling high integration density without proportionally increasing manufacturing complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies preliminary action by forming capacitor structures on the leadframe before the leadframe is finalized and before semiconductor devices are mounted. Capacitor electrodes and dielectric layers are prepared in advance on the leadframe substrate, allowing capacitors to be pre-integrated into the package structure before final assembly operations

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If the conventional fabrication flow is used (masking base metal to etch leadframes first), then leadframe manufacturing is simplified, but only one or few discrete capacitors can be integrated into the package

Engineering Contradiction:
Improveleadframe manufacturing easeVSAvoidnumber of capacitors per package
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent inverts the conventional fabrication sequence by reversing the order of operations: instead of first masking and etching the leadframe to define leadframes, then separately adding capacitors, the method first forms capacitor structures on the unpatterned leadframe substrate, and only then masks and etches to define the final leadframe geometry. This inversion allows multiple capacitors to be integrated before the leadframe patterning step that would otherwise constrain the number of integratable components

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the integration of multiple high-capacitance capacitors within the package, reducing parasitic resistances and costs by allowing capacitors to be placed in electrical proximity, thus enhancing capacitance per area and optimizing package design.

Implementation Method 1

the aluminum surface in the cavities is then oxidized

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

the pores are filled with conductive polymeric compound

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 3

a contact metal such as silver is deposited on the compound

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS9373572B2Semiconductor package having etched foil capacitor integrated into leadframe
Publication Date: 2016.06.21 TEXAS INSTRUMENTS INC
  • US9373572B2 patent drawing
  • US9373572B2 patent drawing
  • US9373572B2 patent drawing

AI summary

A packaged semiconductor device including a leadframe and a plurality of angularly shaped capacitors. The leadframe includes structures with surfaces and sidewalls. The angularly shaped capacitors are attached to surface portions of the leadframe structures. The angularly shaped capacitors have sidewalls coplanar with structure sidewalls. The angularly shaped capacitors includes a conductive material attached to the structure surface. The conductive material having pores covered by oxide and filled with conductive polymer. The angularly shaped capacitors topped by electrodes are made of a second metal.