Etched Planarized VCSEL Aperture Structure for Reliable Single-Mode Output
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Solution Overview
Problem
Existing Vertical Cavity Surface Emitting Lasers (VCSELs) face challenges in achieving high optical output efficiency and modulation bandwidth due to non-planarizing regrowth and antiresonant reflecting optical waveguide designs, which are not suitable for single-mode high-power applications.
Innovation Solution
An etched planarized VCSEL design is implemented, featuring a blocking region with conductive channel cores and a conductive wing layer, where the blocking region is etched and filled with higher refractive index material using MOCVD, allowing for improved current guidance and optical mode confinement without oxidation or mesa formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-planarizing regrowth and antiresonant reflecting optical waveguide designs are used, then manufacturing complexity is reduced, but optical output efficiency and modulation bandwidth are insufficient for high-power single-mode applications
Solution Approach 1:
The blocking region is formed first, followed by selective etching of apertures, then filling with conductive channel cores and planarizing layers. This preliminary structuring enables subsequent mirror formation on a controlled surface, achieving both planarization and optical confinement necessary for high-power single-mode operation
Solution Approach 2:
The patent introduces localized conductive channel cores within the blocking region to provide current guidance, and forms a planarizing layer only where needed to achieve surface planarity. This local modification approach maintains optical output efficiency while managing manufacturing complexity
2Reliability
If oxide apertures and ion implantation are used for current guidance, then manufacturing process is simpler, but optical mode confinement and single-mode performance are compromised
Solution Approach 1:
The patent replaces chemical oxidation and ion implantation methods with a physical vapor deposition approach using MOCVD to form the conductive channel cores and planarizing layers. This substitution provides better optical mode confinement while maintaining manufacturing feasibility through standard semiconductor processes
Solution Approach 2:
The patent uses composite structures combining the blocking region with conductive channel cores filled with higher refractive index material, and overlays a planarizing layer. This composite approach achieves superior optical mode confinement compared to single-material oxide apertures
3Power
If higher power per VCSEL is achieved, then data transmission capability improves, but defect formation at higher temperatures increases
Solution Approach 1:
The patent introduces a planarizing layer as an intermediary between the conductive channel cores and the top mirror. This intermediate layer distributes thermal and mechanical stresses, enabling higher power operation while reducing defect formation at elevated temperatures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances fiber optic transceiver reliability, electro-optical bandwidth, and link distances, enabling higher power per VCSEL and more emitters per unit area, with improved manufacturing efficiency and reduced defect formation at higher temperatures.
Implementation Method 1
etched and filled with higher refractive index material using MOCVD
Implementation Method 2
conductive channel cores and a conductive wing layer, where the blocking region is etched and filled with higher refractive index material
Implementation Method 3
A VCSEL has a laser cavity that is sandwiched between and defined by two mirror stacks... As light passes from a layer of one index of refraction to another, a portion of the light is reflected
Data Source
Figure 1
Figure 2~2B
Figure 3~4
AI summary
An etched planarized VCSEL includes: an active region (122) comprising MQW (138,140); a blocking region (127,160) over the active region which may be made form InGaP, and defining apertures therein; and conductive channel cores (129,162) in the apertures which may be made from AIGaAs, wherein the conductive channel cores and blocking region form an isolation region (128). The VCSEL may comprise spacer layers (148,150). A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region. This kind of providing a current aperture for a VCSEL avoids the reliability problems of current apertures provided by lateral oxidisation of a layer in the mesa of the VCSEL.