Etching Chamber Baking Module for In-Situ By-Product Removal

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Solution Overview

Problem

Existing etching systems for semiconductor wafer processing are inefficient in removing by-products, leading to low fabrication throughput and degraded etching performance.

Innovation Solution

A semiconductor processing system with integrated chemical removal chambers equipped with an embedded heating mechanism, such as an IR lamp or microwave source, allows for in-situ baking and simultaneous etching and cleaning, enhancing efficiency by performing both processes in the same chamber.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate baking chambers are used to remove by-products, then by-product removal effectiveness is improved, but device complexity and fabrication throughput are worsened

Engineering Contradiction:
Improveby-product removal effectivenessVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the etching chamber and baking chamber into a single integrated processing chamber. The etching process and by-product removal process are performed sequentially in the same chamber, eliminating the need for separate baking chambers. This merging reduces system complexity while maintaining effective by-product removal through the same processing chamber.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If separate baking chambers are used to remove by-products, then by-product removal effectiveness is improved, but fabrication throughput is worsened

Engineering Contradiction:
Improveby-product removal effectivenessVSAvoidfabrication throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By merging the etching and baking functions into a single chamber, the patent enables continuous processing where the wafer undergoes etching followed immediately by by-product removal in the same chamber without requiring transfer to a separate baking chamber. This integration eliminates idle time and improves fabrication throughput while maintaining effective by-product removal.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If multiple processing chambers are used, then process functionality is improved, but loss of time and fabrication throughput are worsened

Engineering Contradiction:
Improveprocess functionalityVSAvoidfabrication time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent designs the processing chamber to perform multiple functions: etching, by-product removal, and cleaning. The same chamber and processing system handle different process steps sequentially, eliminating the need for multiple specialized chambers. This multi-functionality reduces fabrication time while maintaining comprehensive process capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly increases fabrication throughput by efficiently removing by-products at high temperatures, eliminating the need for separate baking chambers and improving etching performance.

Implementation Method 1

an embedded heating mechanism, such as an IR lamp or microwave source, allows for in-situ baking

Methodology Applied
Scientific EffectThermal radiation: Thermal Radiation

Implementation Method 2

such as an IR lamp or microwave source, allows for in-situ baking

Methodology Applied
Scientific EffectInfrared radiation: Infrared Radiation

Data Source

PatentUS20240347345A1Semiconductor fabrication system embedded with effective baking module
Publication Date: 2024.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240347345A1 patent drawing
  • US20240347345A1 patent drawing
  • US20240347345A1 patent drawing

AI summary

A semiconductor fabrication apparatus includes a processing chamber for etching, a substrate stage integrated in the processing chamber and being configured to secure a semiconductor wafer, and a gas distribution plate integrated inside the processing chamber. The processing chamber includes a sidewall and a top surface. The semiconductor fabrication apparatus further includes a heating mechanism disposed on the sidewall of the processing chamber and is operable to perform a baking process to remove a by-product generated during the etching, and a reflective mirror configured inside the processing chamber to reflect thermal energy from the heating mechanism toward the semiconductor wafer, the reflective mirror being located on the top surface of the processing chamber. The gas distribution plate defines a portion of the top surface of the processing chamber. From a top view, a portion of the reflective mirror is disposed between the heating mechanism and the gas distribution plate.